參數(shù)資料
型號: AD9920ABBCZRL
廠商: Analog Devices Inc
文件頁數(shù): 69/112頁
文件大小: 0K
描述: IC PROCESSOR CCD 12BIT 105CSPBGA
標準包裝: 2,000
位數(shù): 12
電壓 - 電源,模擬: 1.6 V ~ 2 V
電壓 - 電源,數(shù)字: 1.6 V ~ 2 V
封裝/外殼: 105-LFBGA,CSPBGA
供應商設備封裝: 105-CSPBGA(8x8)
包裝: 帶卷 (TR)
AD9920A
Rev. B | Page 6 of 112
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
BLACK LEVEL CLAMP
Clamp Level Resolution
1024
Steps
Clamp Level
Measured at ADC output
Minimum Clamp Level
Code 0
0
LSB
Maximum Clamp Level
Code 1023
255
LSB
ADC
Resolution
12
Bits
Differential Nonlinearity (DNL)2
±0.5
LSB
No Missing Codes
Guaranteed
Integral Nonlinearity (INL)2
±3.0
LSB
Full-Scale Input Voltage
2.0
V
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
1.4
V
Reference Bottom Voltage (REFB)
0.4
V
SYSTEM PERFORMANCE
Includes entire signal chain
Gain Accuracy
0 dB CDS gain
Low Gain
VGA Code 15
Gain = (0.0358 × code) + 5.76 dB
5.7
6.2
6.7
dB
Maximum Gain
VGA Code 1023
41.8
42.3
42.8
dB
Peak Nonlinearity, 1 V Input Signal2
6 dB VGA gain, 0 dB CDS gain applied
0.1
0.3
%
Total Output Noise2
AC-grounded input, 6 dB VGA gain
applied
0.6
LSB rms
Power Supply Rejection (PSR)2
Measured with step change on supply
40
dB
1 Input signal characteristics are defined as shown in Figure 2.
800mV
MAXIMUM
MINIMUM INPUT LIMIT
(AVSS – 0.3V)
0V (AVSS)
1V MAXIMUM INPUT SIGNAL RANGE
(0dB CDS GAIN)
+1.3V TYP (AVDD – 0.5V)
DC RESTORE VOLTAGE
+1.8V TYP (AVDD)
MAXIMUM INPUT LIMIT = LESSER OF
2.2V OR AVDD + 0.3V
200mV MAX
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
06
87
8-
0
02
Figure 2. Input Signal Characteristics
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