參數(shù)資料
型號: AD9920ABBCZRL
廠商: Analog Devices Inc
文件頁數(shù): 2/112頁
文件大?。?/td> 0K
描述: IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
電壓 - 電源,模擬: 1.6 V ~ 2 V
電壓 - 電源,數(shù)字: 1.6 V ~ 2 V
封裝/外殼: 105-LFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 105-CSPBGA(8x8)
包裝: 帶卷 (TR)
AD9920A
Rev. B | Page 10 of 112
ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 6.
Parameter
Rating
AVDD to AVSS
0.3 V to +2.2 V
TCVDD to TCVSS
0.3 V to +2.2 V
HVDD1, HVDD2 to HVSS1, HVSS2
0.3 V to +3.9 V
RGVDD to RGVSS
0.3 V to +3.9 V
DVDD to DVSS
0.3 V to +2.2 V
DRVDD to DRVSS/LDOVSS
0.3 V to +3.9 V
IOVDD to IOVSS
0.3 V to +3.9 V
VDVDD to VDVSS
0.3 V to +3.9 V
CLIVDD to TCVSS
0.3 V to +3.9 V
VH1, VH2 to VL1, VL2, VLL
0.3 V to +25.0 V
VH1, VH2 to VDVSS
0.3 V to +17.0 V
VL1, VL2 to VDVSS
17.0 V to +0.3 V
VM1, VM2 to VDVSS
6.0 V to +3.0 V
VLL to VDVSS
17.0 V to +0.3 V
VMM to VDVSS
VLL 0.3 V to VDVDD + 0.3 V
V1A to V16 to VDVSS
VLx 0.3 V to VHx + 0.3 V
RG and HL Outputs to RGVSS
0.3 V to RGVDD + 0.3 V
H1 to H8 Outputs to HVSSx
0.3 V to HVDDx + 0.3 V
VDR_EN, XSUBCNT, SRCTL, SRSW
to VDVSS
0.3 V to VDVDD + 0.3 V
Digital Outputs to IOVSS
0.3 V to IOVDD + 0.3 V
Digital Inputs to IOVSS
0.3 V to IOVDD + 0.3 V
SCK, SL, SDATA to DVSS
0.3 V to DVDD + 0.3 V
REFT, REFB, CCDIN to AVSS
0.3 V to AVDD + 0.3 V
Junction Temperature
150°C
Lead Temperature
(Soldering, 10 sec)
350°C
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
θJA
Unit
CSP_BGA (BC-105-1)
40.3
°C/W
ESD CAUTION
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