參數(shù)資料
型號(hào)： AD9920ABBCZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 56/112頁(yè)
文件大?。?/td> 0K
描述： IC PROCESSOR CCD 12BIT 105CSPBGA
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 12
電壓 - 電源，模擬： 1.6 V ~ 2 V
電壓 - 電源，數(shù)字： 1.6 V ~ 2 V
封裝/外殼： 105-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 105-CSPBGA（8x8）
包裝： 帶卷 (TR)
AD9920A
Rev. B | Page 48 of 112
Vertical Sensor Gate (Shift Gate) Patterns
In an interline CCD, the vertical sensor gate (VSG) pulses are
used to transfer the pixel charges from the light-sensitive image
area into light-shielded vertical registers. From the light-shielded
vertical registers, the image is clocked out line-by-line using the
vertical transfer pulses (XV signals) in conjunction with the high
speed horizontal clocks. The AD9920A has 24 vertical signals,
and each signal can be assigned as a VSG pulse instead of as an
XV pulse.
Table 21 summarizes the VSG control registers, which are
mainly located in the field register space (see Table 19). The
VSGSELECT register (Address 0x1C in the fixed address space)
determines which vertical outputs are assigned as VSG pulses.
When a signal is selected to be a VSG pulse, only the starting
polarity and two of the V-pattern toggle positions are used. The
VSGPATSEL register in the V-sequence registers is used to assign
either TOG1 and TOG2 or TOG3 and TOG4 to the VSG signal.
Note that only two of the four V-pattern toggle positions are
available when a vertical signal is selected to be a VSG pulse.
The SGACTLINE1 and SGACTLINE2 registers are used to
select which line in the field is the VSG line. The VSG active
line location is used to reference when the substrate clocking
(SUBCK) signal begins to operate in each field. For more infor-
mation, see the Substrate Clock Operation (SUBCK) section.
Also located in the field registers, the SGMASK register selects
which individual VSG pulses are active in a given field. Therefore,
all SG patterns to be preprogrammed into the V-pattern registers
and the appropriate pulses for the different fields can be enabled
separately.
The AD9920A is an integrated AFETG and V-driver, so the
connections between the AFETG and V-driver are fixed, as
shown in Figure 65 and Figure 66. The VSGSELECT register
must be programmed to 0xFF8000.
Table 21. VSG Control Registers (also see Field Registers in Table 19)
Register
Length (Bits)
Range
Description
VSGSELECT
(Located in Fixed
Address Space, 0x1C)
24
High/low
Selection of VSG signals from XV signals. Set to 1 to make signal a VSG.
The recommended setting for this register is 0xFF8000.
Bit 0: XV1 selection (0 = XV pulse; 1 = VSG pulse).
Bit 1: XV2 selection.
Bit 23: XV24 selection.
VSGPATSEL
24
High/low
When VSG signal is selected using the VSGSELECT register, VSGPATSEL
selects which V-pattern toggle positions are used. When this register is
set to 0, Toggle 1 and Toggle 2 are used. When this register is set to 1,
Toggle 3 and Toggle 4 are used.
Bit 0: XV1 selection (0 = use TOG1, TOG2; 1 = use TOG3, TOG4).
Bit 1: XV2 selection.
Bit 23: XV24 selection.
SGMASK
24
High/low, each VSG
Set high to mask each individual VSG output.
Bit 0: XV1 mask.
Bit 23: XV24 mask.
SGACTLINE1
13
0 to 8191 line number
Selects the line in the field where the VSG signals are active.
SGACTLINE2
13
0 to 8191 line number
Selects a second line in the field to repeat the VSG signals. If this register
is not used, set it equal in value to SGACTLINE1 or to the maximum value.
VD
HD
VSG PATTERN
4
12
3
PROGRAMMABLE SETTINGS FOR EACH PATTERN:
1START POLARITY OF PULSE (FROM VPOL IN SEQUENCE REGISTERS).
2FIRST TOGGLE POSITION (FROM V-PATTERN REGISTERS).
3SECOND TOGGLE POSITION (FROM V-PATTERN REGISTERS).
4ACTIVE LINE FOR VSG PULSES WITHIN THE FIELD (FROM FIELD REGISTERS).
06
87
8-
05
9
Figure 60. Vertical Sensor Gate Pulse Placement
相關(guān)PDF資料
PDF描述
AD9978BCPZRL IC PROCESSOR CCD 14BIT 40-LFCSP
ADADC71KD IC ADC 16BIT HIGH RES 32-CDIP
ADADC80-Z-12 IC ADC 12BIT INTEGRATED 32-CDIP
ADATE207BBPZ IC TIMING FORMATTER QUAD 256BGA
ADC0804LCN IC ADC 8-BIT 10KSPS 1LSB 20-DIP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9920BBCZ 制造商:Analog Devices 功能描述:
AD9920BBCZRL 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9921BBCZ 制造商:Analog Devices 功能描述:
AD9921BBCZRL 制造商:Analog Devices 功能描述:
AD9923A 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:CCD Signal Processor with V-Driver and Precision Timing⑩ Generator
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*