參數(shù)資料
型號： UPD46128953-X
廠商： NEC Corp.
英文描述： 128M-BIT CMOS MOBILE SPECIFIED RAM 4M-WORD BY 32-BIT ADDRESS / DATA MULTIPLEXED EXTENDED TEMPERATURE OPERATION
中文描述： 128兆位CMOS移動(dòng)指明內(nèi)存分詞由32位地址/數(shù)據(jù)復(fù)用溫度范圍
文件頁數(shù)： 24/60頁
文件大?。?/td> 468K
代理商： UPD46128953-X
Preliminary Data Sheet M17506EJ1V1DS
24
μ
PD46128953-X
Once the mode register has been set, the setting is retained while power is supplied and CE2 = HIGH, until it is re-set.
If data is not retained by turning off the power or making CE2 LOW (except partial), however, the setting of the mode
register is undefined. Re-set the register after power application or when returning from a data non-retention status.
For the timing chart and flowchart, refer to
Figure 8-1. Mode Register Setting Timing Chart
and
Figure 8-2. Mode
Register Setting Flowchart
.
Table 4-2. Mode Register Code1 Definition (4th Bus Cycle)
Data Code
Symbol
Function
Value
Description
A/DQ0
RW
Mode Register Setting /
0
Mode Register Reading
Mode Register Reading
1
Mode Register Setting
A/DQ21 to A/DQ1
All “1”
Reserved
DQ31 to DQ22
All “1”
Reserved
Table 4-3. Mode Register Code2 Definition (5th Bus Cycle)
Data Code
Symbol
Function
Value
Description
A/DQ1 to A/DQ0
PR
Partial Refresh Density
00
32M
01
16M
10
64M
11
0M
A/DQ4 to A/DQ2
BL
Burst length
000
Reserved
001
Reserved
010
8 double words
011
Reserved
100
Reserved
101
Reserved
110
Reserved
111
Reserved
A/DQ5
M
Function Mode
0
Synchronous Burst
1
Reserved
A/DQ7 to A/DQ6
DS
Driver Strength
00
Strong
01
Reserved
10
Weak
11
Middle
A/DQ21 to A/DQ8
–
–
All “1”
Reserved
DQ31 to DQ22
–
–
All “1”
Reserved
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