- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385942 > TNETA1560 (Texas Instruments, Inc.) ATM Segmentation and Reassembly Device with SBUS Host Interface(ATM 分段和重設裝置帶SBUS主機接口) PDF資料下載
參數(shù)資料
| 型號： | TNETA1560 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ATM Segmentation and Reassembly Device with SBUS Host Interface(ATM 分段和重設裝置帶SBUS主機接口) |
| 中文描述： | 自動柜員機分段和重組與SBus主機接口（自動柜員機分段和重設裝置帶SBU的主機接口設備） |
| 文件頁數(shù)： | 33/40頁 |
| 文件大小： | 804K |
| 代理商： | TNETA1560 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當前第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
TNETA1560
ATM SEGMENTATION AND REASSEMBLY DEVICE
WITH SBUS HOST INTERFACE
SDNS010C – JANUARY 1994 – REVISED OCTOBER 1995
33
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
receive DMA block (continued)
Data with the PTI field equal to 10X, representing VC-level OAM cells, is diverted to DMA channel 0 that
operates in the null-AAL mode with a packet length of one cell. Word 0 in each receive DMA-channel entry is
copied from word 3 at the start of each new packet. A number of the fields in word 0 represent the dynamic state
of the reassembly process for a cell. The fields in word 3 represent one-time configuration values for the VC
entered by the host. SAR accesses word 0 during normal cell-level processing to retrieve configuration items.
RX DMA word 0 – VC status/configuration
Control (bits 31 – 23)
Current-congestion number (bits 21 – 11)
Current-packet length (bits 10 – 0)
Unused (bit 22)
OWN (31)
The OWN bit is set when the DMA channel for this BWG is active and all DMA parameters such as the
receive-data pointer, buffer length, and packet length are current. The OWN bit is set by the SAR when word
3 is copied to word 0 at the start of each new packet. The bit is cleared by the SAR when the entire packet has
been posted to a buffer in host memory. The BWG is inactive when the OWN bit is zero. The free-buffer ring
indicated in word 3 is used to poll a new buffer on the arrival of the first cell of a new packet on the VCI used
to index this BWG.
static-configuration bits from word 3
Table 11 summarizes six static-configuration bits copied from word 3 at the start of each packet. Each is
described in detail in the section on word 3 of this DMA block.
Table 11. RX DMA Word 0 Static-Configuration Bit Summary
LOCATION
FIELD
Bit 30
VC_ON
Bit 29
Buffer type: small or big
Bit 28
Null-AAL5 indication
Bit 25
AAL3/4 indication
Bit 24
End-of-packet wait
Bit 23
Enable-end-of-packet wait
explicit-forward congestion-notification (EFCN) cell counter (bits 21 – 11)
The number of cells received with the EFCN indicator set in each packet is counted and the value stored in this
field. The EFCN indication is given a logic value of 01x in the PTI field of the ATM header. This value is passed
to the receive completion ring at the end of each packet. Since this field is copied from word 3 at the start of each
new packet, it is reset to zero at this time.
packet length (bits 10 – 0)
The packet-length field in word 0 is set up with the two’s-complement value for the buffer size used by this BWG
at the start of each new packet. The counter is incremented with each new cell until the EOP signal or until the
value is zero. Null-AAL packets are terminated when the value of this counter reaches zero. If either the AAL5
or AAL3/4 packet fills the buffer to capacity, the counter reaches zero and the packet is terminated with the
buffer-overflow indicator set in the receive completion-ring entry.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TNETA1561 | ATM Segmentation and Reassembly Device with PCI Host Interface(ATM 分段和重設裝置帶SBUS主機接口) |
| TNETA1600 | SONET/SDH ATM Receiver/Transmitter for 622.08-Mit/s or 155.52-Mbit/s Operation(SONET/SDH ATM接收器/傳送器) |
| TNETA1610 | STS-12c/STM-4 Receiver/Transmitter with Clock Recovery/Generation(STS-12C/STM-4接收/傳送器) |
| TNETA1611 | STS-12c/STM-4 Receiver/Transimitter(STS-12C/STM-4接收/傳送器) |
| TNETA1630 | 622.08-MHz Clock-Recovery Device(622.08-MHz時鐘發(fā)生裝置) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TNETA1560MFP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| TNETA1560PGC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TNETA1561PGC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TNETA1570 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:ATM SEGMENTATION AND REASSEMBLY DEVICE WITH INTEGRATED 64-BIT PCI-HOST INTERFACE |
| TNETA1570MFP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Segmentation and Reassembly Circuit |
發(fā)布緊急采購，3分鐘左右您將得到回復。