參數(shù)資料
型號： SMJ34020AHT
廠商： Texas Instruments, Inc.
英文描述： GRAPHICS SYSTEM PROCESSOR
中文描述： 圖形系統(tǒng)處理器
文件頁數(shù)： 61/92頁
文件大?。?/td> 1458K
代理商： SMJ34020AHT
SMJ34020A
GRAPHICS SYSTEMPROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
61
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
cycle timing examples (continued)
GI
ALTCH
(see Note B)
RAS
WE
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
R1
LAD
Command
CAMD
CAS
TR/QE
SF
DDIN
DDOUT
R0
PGMD
(see Note B)
SIZE16
(see Note C)
LRDY
BUSFLT
RCA
LCLK1
LCLK2
(TMS34020A)
(see Note A)
Command Cycle
NOTES: A. LAD (SMJ34020A):
LAD command:
code present on LAD
B. Although the coprocessor internal command never requires the
use of page mode cycles, PGMD should be held at a valid level
during the start of Q2 after ALTCH has gone low.
C. All coprocessor cycles are implemented as 32-bit operations;
therefore, SIZE16 should be high during these cycles.
Output to LAD by the SMJ34020A
Coprocessor ID, instruction and status
Figure 29. Coprocessor-Internal Operation Command Cycle
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