- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373427 > SMJ34020AHT (Texas Instruments, Inc.) GRAPHICS SYSTEM PROCESSOR PDF資料下載
參數(shù)資料
| 型號： | SMJ34020AHT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GRAPHICS SYSTEM PROCESSOR |
| 中文描述： | 圖形系統(tǒng)處理器 |
| 文件頁數(shù)： | 37/92頁 |
| 文件大小： | 1458K |
| 代理商： | SMJ34020AHT |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當(dāng)前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
SMJ34020A
GRAPHICS SYSTEMPROCESSOR
SGUS011B – APRIL 1991 – REVISED AUGUST 1995
37
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
cycle timing examples (continued)
The clock stretch is also performed when a VBLT or VFILL instruction is executed and PMASKL and PMASKH
are set to nonzero values (Figure 12). It is indicated by CAS, TR/QE, and SF high and WE low at the falling edge
of RAS and by SF high at the falling edge of CAS. The data on LAD is used as an address mask, and the data
stored in the color latch is written to the VRAM, just as in the block-write cycle without mask, except that the
data in the write mask is used to enable the bits from the color latch that are written to memory. This cycle allows
up to 16 bits to be written into each VRAM (four adjacent nibbles, each set to the value in the color latch as
enabled by the write mask) for a total of 128 bits. During the address portion of the cycle, the status on
LAD0–LAD3
indicates a block write is being performed (status code = 1110). SIZE16 can be used with this
cycle, but external multiplex logic is required to map the data correctly to appropriate memories.
Q4
Q1
Q2
Q3
Q1
Q2
Q3
Q4
Q1
Row
Address
Data Out 1
Q2
Q3
Q4
Q1
Data Out 2
1st Column
2nd Column
GI
LAD
CAMD
RCA
ALTCH
RAS
CAS
WE
TR/QE
SF
DDIN
DDOUT
LRDY
PGMD
SIZE16
BUSFLT
R0
R1
Q4
See clock stretch, page 20.
Figure 12. Block-Write-Cycle Timing (With Mask)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SMJ4256 | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ4256FV | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ4256JD | 262,144-BIT DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ44400 | 1M x 4 DRAM DYNAMIC RANDOM-ACCESS MEMORY |
| SMJ44400HR | 1M x 4 DRAM DYNAMIC RANDOM-ACCESS MEMORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SMJ34020AHTM32 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020AHTM40 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:GRAPHICS SYSTEM PROCESSOR |
| SMJ34020HTM28 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| SMJ34061GB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Non-VGA Video Controller |
| SMJ34061GBS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。