參數(shù)資料
型號： SiI0680ACLU144
廠商： Silicon Image, Inc.
英文描述： PCI to IDE/ATA
中文描述： PCI到IDE / ATA的
文件頁數(shù)： 93/124頁
文件大?。?/td> 820K
代理商： SII0680ACLU144
Silicon Image, Inc.
9.7.37
Test Register – IDE0
Address Offset: B0
H
Access Type: Read/Write
Reset Value: 0x0000_0000
SiI0680A PCI to IDE/ATA
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0069-C
93
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Module Select
Nibble Select
Sub-Module Select
Data Field
This register defines the test register for IDE Channel #0 in the SiI 0680A. This register is for chip-level simulation and
verification purposes only. The register bits are defined below.
Bit [31:28]
: Module Select (R/W) – IDE0 Test Module Select. This bit field is used to select the logic module for
testing: 0001
B
= DIF module; 0010
B
= TMR module; 0011
B
= PIF module; and, 0100
B
= DUW module.
Bit [27:24]
: Nibble Select (R/W) – IDE0 Test Control Nibble Select. This bit field is used to select the control
nibble for testing. A value of 0001
B
selects the least significant nibble, while a value of 1000
B
selects the most
significant nibble.
Bit [23:16]
: Sub-Module Select (R/W) – IDE0 Test Sub-Module Select. This bit field is used to select the logic
sub-module for testing. The valid selections are listed below.
Module Select
Sub-Module Select
Description
0001
B
0001
B
FIFO Data
0010
B
0001
B
Timer 1
0010
B
0010
B
Timer 2
0010
B
0011
B
Timer 3
0010
B
0100
B
Timer 4
0011
B
0001
B
PBM_BYTE_CNT
0011
B
0010
B
WD_TMO
0100
B
0001
B
DUW_TMR_CNT
Table 9-10: IDE0 Test Register Selections
Bit [15:00]
: Data Field (R/W) – IDE0 Test Data Field. This bit field is used to write a preload value to the
selected counter or read the current value of the selected counter.
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