參數(shù)資料
型號(hào)： SiI0680ACLU144
廠商： Silicon Image, Inc.
英文描述： PCI to IDE/ATA
中文描述： PCI到IDE / ATA的
文件頁數(shù)： 47/124頁
文件大?。?/td> 820K
代理商： SII0680ACLU144
Silicon Image, Inc.
SiI0680A PCI to IDE/ATA
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0069-C
47
Register Name
Address
Offset
31
16
15
00
Access
Type
54
H
Reserved
-
58
H
Reserved
-
5C
H
Reserved
-
60
H
Power Management Capabilities
Next Item Pointer
Capability ID
R/W
64
H
Data
Reserved
Functions Control and Status
R/W
68
H
Reserved
-
6C
H
Reserved
-
70
H
Reserved
PCI Bus Master
Status – IDE0
Reserved
PCI Bus Master
Command – IDE0
R/W
74
H
PRD Table Address – IDE0
R/W
78
H
Reserved
PCI Bus Master
Status – IDE1
Reserved
PCI Bus Master
Command – IDE1
R/W
7C
H
PRD Table Address – IDE1
R/W
80
H
Reserved
IDE0 Data
Transfer Mode
R/W
84
H
Reserved
IDE1 Data
Transfer Mode
R/W
88
H
System Configuration Status
System Command
R/W
8C
H
System Software Data
R/W
90
H
FLASH Memory Address – Command + Status
R/W
94
H
Reserved
Flash Memory
Data
R/W
98
H
EEPROM Memory Address – Command + Status
R/W
9C
H
Reserved
EEPROM Memory
Data
R/W
A0
H
IDE0 TF Timing
IDE0 Config
+ Status
IDE0 Cmd
+ Status
R/W
A4
H
IDE0 Device 1 PIO Timing
IDE0 Device 0 PIO Timing
R/W
A8
H
IDE0 Device 1 DMA Timing
IDE0 Device 0 DMA Timing
R/W
AC
H
IDE0 Device 1 UDMA Timing
IDE0 Device 0 UDMA Timing
R/W
B0
H
IDE1 TF Timing
IDE1 Config
+ Status
IDE1 Cmd
+ Status
R/W
B4
H
IDE1 Device 1 PIO Timing
IDE1 Device 0 PIO Timing
R/W
B8
H
IDE1 Device 1 DMA Timing
IDE1 Device 0 DMA Timing
R/W
BC
H
IDE1 Device 1 UDMA Timing
IDE1 Device 0 UDMA Timing
R/W
Table 9-1: SiI 0680A PCI Configuration Space (continued)
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