
SiI0680A PCI to IDE/ATA 
Data Sheet
Silicon Image, Inc. 
 2006 Silicon Image, Inc.  
SiI-DS-0069-C
8 
Table of Figures 
Figure 1-1: SiI 0680A Functional Block Diagram........................................................................................................................11
Figure 1-2: Address Lines During Configuration Cycle...............................................................................................................13
Figure 3-1: SiI 0680A Pin Diagram.............................................................................................................................................23
Figure 3-2: Package Drawing – 144 LQFP.................................................................................................................................32
Figure 3-3: Marking Specification – SiI0680ACL144..................................................................................................................33
Figure 3-4: Marking Specification – SiI0680ACLU144................................................................................................................33
Figure 5-1: SiI 0680A ASIC Block Diagram................................................................................................................................34
Figure 6-1: SiI 0680A Clocking System and Test Feature Diagram ...........................................................................................37
Figure 7-1:  Schematic of PLL Circuitry......................................................................................................................................38
Figure 7-2:  Example Layout – Ground Plane ............................................................................................................................41
Figure 7-2:  Example Layout – Power Plane ..............................................................................................................................42
Figure 8-1:  Auto-Initialization from Flash Timing.......................................................................................................................43
Figure 8-2: Auto-Initialization from EEPROM Timing .................................................................................................................44
Figure 10-1: SiI 0680A Clocking System and Test Feature Diagram .......................................................................................103
Figure 10-2: Test Mode Register Programming (A1
H
)..............................................................................................................104
Figure 10-3: SiI 0680A NAND Tree..........................................................................................................................................105
Figure 10-4:  PLL Test Logic....................................................................................................................................................107