
Silicon Image, Inc.
SiI0680A PCI to IDE/ATA
Data Sheet
2006 Silicon Image, Inc.
SiI-DS-0069-C
43
8. Auto-Initialization
The SiI 0680A ASIC supports an external FLASH and/or EEPROM device for BIOS extensions and user-defined PCI
configuration header data. Interface to either memory device is performed through a set of special function ATA pins. These
pins are active in the SiI 0680A auto-initialization mode after release of PCI_RST_N, and return to normal ATA function mode
after the auto-initialization is complete.
8.1 Auto-Initialization from FLASH
The SiI 0680A initiates the FLASH detection and configuration space loading sequence upon the release of PCI_RST_N. It
begins by reading the highest two addresses (7FFFF
H
and 7FFFE
H
), checking for the correct data signature pattern – AA
H
and
55
H
, respectively. If the data signature pattern is correct, the SiI 0680A continues to sequence the address downward, reading
a total of twelve bytes. If the Data Signature is correct (55
H
at 7FFFC
H
), the last eight bytes are loaded into the PCI
Configuration Space registers.
Note: If both Flash and EEPROM are installed, the PCI Configuration Space registers will be loaded with EEPROM’s data.
While the sequence is active, the SiI 0680A responds to all PCI bus accesses with a Target Retry.
MEM_ADDR
7FFFF
7FFFC
7FFFD
7FFFE
PCI_RST_N
MEM_CS_N
MEM_WR_N
MEM_RD_N
MEM_DATA
7FFFB
7FFF9
7FFFA
7FFF7
7FFF8
7FFF6
7FFF5
7FFF4
D00
D04
D03
D02
D01
D06
D05
D08
D07
D11
D10
D09
t
1
t
2
Figure 8-1: Auto-Initialization from Flash Timing
Parameter
Value
Description
t
1
660 ns
PCI reset to Flash Auto-Initialization cycle begin
t
2
7200 ns
Flash Auto-Initialization cycle time
Table 8-1: Auto-Initialization from Flash Timing