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參數(shù)資料
| 型號： | SII0680A |
| 廠商： | Silicon Image, Inc. |
| 英文描述： | PCI to IDE/ATA |
| 中文描述： | PCI到IDE / ATA的 |
| 文件頁數(shù)： | 10/124頁 |
| 文件大小： | 820K |
| 代理商： | SII0680A |
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SiI0680A PCI to IDE/ATA
Data Sheet
1.2.3
ATA Features
Supports two independent ATA channels.
Supports ATA 133.
Supports full speed burst transfers on the ATA bus.
Supports software-controlled ATA bus tri-state.
Supports device specific timing registers.
Supports device read-ahead and write-ahead capability under Virtual DMA.
1.2.4
Other Features
Features one 256-byte FIFO (32-bit x 64 deep) per IDE channel for host reads and writes.
Features ATA to PCI interrupt masking.
Features command buffering from the PCI to ATA.
Features Virtual DMA: Bus master transfer on the PCI bus and PIO transfer on the ATA bus.
Features Watch Dog Timer for fault resiliency.
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0069-C
10
1.3 PCI-680 Technical Description
The PCI-680A is available in a 144-pin LQFP (Thin Quad Flat Package) including more ground pins in order to
accommodate the new higher data transfer rate specified in the ATA/ATAPI-6 specification. The chip has an internal
phase lock loop that will provide the 100/133MHz (selectable) internal clock, allowing a data transfer rate of
100/133MB/sec (selectable) on ATA interface. A built-in 80-pin cable detector provides users the ability to determine
whether a cable can support the latest Ultra ATA/100/133 (selectable) transfer rate. The PCI-680 is capable of
supporting Native mode, external BIOS, Enhanced IDE mode (ultra DMA and multiword DMA mode) and PIO mode.
1.4 References
For more details about the ATA technology, the reader is referred to the following industry specifications:
ATA/ATAPI-6 (at time of publication, ATA/ATAPI-6 has not been formally approved)
PCI Local Bus Specification Revision 2.2
Advanced Power Management Specification Revision 1.0
PCI IDE Controller Specification Revision 1.0
Programming Interface for Bus Master IDE Controller, Revision 1.0
1.5 Functional Description
PCI-680 is more than a PCI-to-ATA bridge chip that transfers data between the PCI bus and storage media (e.g hard
disk drive, etc) over the ATA bus. As a host controller, it also performs functions associated with the host, such as
storing configuration information, and processing data for errors. The PCI-680 can be described in the following
functional blocks:
PCI Interface. Provides the interface to any system that has a PCI bus. Instructions and system clocks are based
on this interface.
ATA Interface. Two separate channels (Primary and Secondary) to access storage media such as hard disk drives,
CD-ROM’s etc.
Controller Interface. Additional hardware interface for controlling and configuring the Host Controller.
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