
Silicon Image, Inc. 
SiI0680A PCI to IDE/ATA  
Data Sheet
 2006 Silicon Image, Inc. 
SiI-DS-0069-C
17 
3. Pin Definition 
3.1 PCI-680 Pin Listing 
This section describes the pin-out of the SiI 0680A PCI-to-ATA host controller ASIC. 
Pin 
# 
Pin Name 
Type 
Drive 
Internal 
Resistor 
Description 
1 
 VSS 
GND 
- 
- 
Ground 
2 
 PLL_VDD 
PWR 
- 
- 
PLL 3.3 Volt Power 
3 
 PLL_CPBIAS 
Analog 
- 
- 
PLL Charge Pump Bias 
4 
 PLL_VCOBIAS 
Analog 
- 
- 
PLL VCO Bias 
5 
 PLL_LOOPFLT 
Analog 
- 
- 
PLL Loop Filter 
6 
 PLL_GND 
GND 
- 
- 
PLL Ground 
7 
 TEST_MODE 
I 
- 
PD – 20k 
ASIC Test Mode Enable 
8 
 IDE0_DD00 
I/O 
ATA Buffer 
PU – 100k 
IDE #0 Data Bus  bit 0 / FLASH 
memory address bit 18 
9 
 IDE0_DD01 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 1 / FLASH 
memory address bit 17 
10 
 IDE0_DD02 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 2 / FLASH 
memory address bit 16 
11 
 IDE0_DD03 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 3 / FLASH 
memory address bit 15 
12 
 IDE0_DD04 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 4 / FLASH 
memory address bit 14 
13 
 IDE0_DD05 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 5 / FLASH 
memory address bit 13 
14 
 IDE0_DD06 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 6 / FLASH 
memory address bit 12 
15 
 IDE0_DD07 
I/O 
ATA Buffer
PD – 100k 
IDE #0 Data Bus  bit 7 / FLASH 
memory address bit 11 
16 
 VDD 
PWR 
- 
- 
3.3 Volt Power 
17 
 VSS 
GND 
- 
- 
Ground 
18 
 IDE0_DD08 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 8 / FLASH 
memory address bit 10 
19 
 IDE0_DD09 
I/O 
ATA Buffer
PU – 100k 
IDE #0 Data Bus  bit 9 / FLASH 
memory address bit 9 
Table 3-1: SiI 0680A Pin Listing