
SAA8200HL_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 17 October 2005
41 of 71
Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
Simple switched resistors architecture
Data-weighted averaging technique reducing distortion
Large supply voltage range (0.8 V to 3.6 V)
Low noise (N > 100 dBA).
7.20.1.2
Functional description
The SDAC comprises the following functions:
Sound feature processor
Digital upsampling filter
Noise shaper
DAC.
Digital de-emphasis can be set by a 3-bit control bus (bits CTRL_INTI[18:16]) for the
range of sample frequencies available (32 kHz, 44.1 kHz, 48 kHz and 96 kHz). The
de-emphasis filters are only in the signal path for normal speed mode (data input at 1f
s
).
In the interpolation filter a three stage linear digital volume control is provided with a range
from 0 dB to
89 dB and
∞
dB. Down to the attenuation of
50 dB the step size equals
0.25 dB, from
50 dB to
83 dB it equals 3 dB and the last step to
89 dB is one of 6 dB.
The attenuation for the left channel is controlled by bits CTRL_INTI[15:8]; the attenuation
for the right channel is controlled by bits CTRL_INTI[7:0].
When the left and right channels of the interpolator are muted (bit CTRL_INTI[19] = 1), the
gain in the interpolator is decreased to
∞
dB conforming to a raised cosine function to
avoid harsh audible plops (soft mute). This mute function is completed after a period of
128 samples in normal mode i.e. 2.9 ms at f
s
= 44.1 kHz. When a complete mute is
achieved for both left and right channels, the bit CTRL_INTO[0] is made a logic 1. The
interpolator mute function is illustrated in
Figure 11
.
Fig 10. Block diagram of the SDAC
001aab465
SAA8200HL
SOUND CONTROL
INTERPOLATION FILTER
AND
NOISESHAPER
HP
DAC
V
DD
DIN_L[23:0]
DIN_R[23:0]
DIN_VALID
DAC
HP_OUTL
HP_OUTC
HP_OUTR
DAC_OUTL
DAC_OUTR
16
18
20
14
15
V
DDA(3V3_DAC)
V
DAC_REFN
V
DAC_REFP
V
SS