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參數(shù)資料
| 型號： | SAA8200HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Ensation Base integrated wireless audio baseband |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 26/71頁 |
| 文件大?。?/td> | 298K |
| 代理商： | SAA8200HL |
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SAA8200HL_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 17 October 2005
26 of 71
Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
7.6 System I
2
C-bus interface
A master and slave DMA interface to the EPICS7B sub-system and the means to select
one or the other are provided. The I
2
C-bus master/slave module provides a serial
interface that meets the I
2
C-bus specification and supports all transfer modes from and to
the I
2
C-bus.
Features:
Supports both the normal mode (100 kHz SCL) and the fast mode (400 kHz SCL)
32-bit word access from the CPU side
Interrupt generation on received or sent byte (and some special cases)
Four modes of operation:
–
master transmitter
–
master receiver
–
slave transmitter
–
slave receiver.
7.7 Control ADC
This section describes the multi-channel 10-bit control ADC interface module, a module
that connects an ADC to a DSP. The ADC interface module can be used for observing
battery voltage.
The interface can be divided into two main modules; a 10-bit ADC and an ADC controller.
The 10-bit ADC is a 10-bit successive approximation ADC. The ADC controller module is
responsible for the communication between the ADC and DSP.
Features:
Four analog input channels, selected by an analog multiplexer
Programmable ADC resolution from 2-bit to 10-bit
Single ADC scan mode and continuous ADC scan mode
Converted digital values are stored in a 2
×
10-bit register
Power-down mode.
7.8 Watchdog timer
Once the watchdog is enabled, it will monitor the programmed time out period and
generates a reset request when the period expires. In normal operation the watchdog is
triggered periodically, resetting the watchdog counter and ensuring that no reset is
generated. In the event of a software or hardware failure preventing the CPU from
triggering the watchdog, the time out will be exceeded and a reset requested from the
CGU.
The interrupt pin of this watchdog timer is not connected to the interrupt controller. Instead
of this, two pins M0 and M1 are used which will generate events. Pins M0 and M1 will
generate events when their match register matches the Timer Counter (TC) register.
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相關(guān)代理商/技術(shù)參數(shù) |
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| SAA8200HL/N100,518 | 制造商:ST-Ericsson 功能描述:SAA8200HL Series Ensation Base Integrated Wireless Audio Baseband - LQFP-100 |
| SAA8510EV1UM | 制造商:STMicroelectronics 功能描述: |
| SA-A870-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
| SA-A871-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
| SA-A877-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
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