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參數(shù)資料
| 型號： | SAA8200HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Ensation Base integrated wireless audio baseband |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-407-1, LQFP-100 |
| 文件頁數(shù)： | 19/71頁 |
| 文件大小： | 298K |
| 代理商： | SAA8200HL |
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SAA8200HL_2
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 02 — 17 October 2005
19 of 71
Philips Semiconductors
SAA8200HL
Ensation Base integrated wireless audio baseband
0x0228
0x022C
0x0230
0x0234
0x0238
0x023C
0x0240
0x0244
0x0248
0x024C
0x0250
0x0254
0x0258
0x025C
0x0260
0x0264
0x0268
0x026C
0x0270
0x0274
0x0278
0x027C
0x0280
0x0284
0x0288
0x028C
0x0290
0x0294
0x0298
0x029C
0x02A0
0x02A4
0x02A8
0x02AC
0x02B0
0x02B4
ESR_UART_UCLK
ESR_VPB1_PCLK
ESR_UART_PCLK
ESR_DEBOUNCE_PCLK
ESR_CGU_PCLK
ESR_WDOG_PCLK
ESR_ADC_PCLK
ESR_IOCONF_PCLK
ESR_EVENT_ROUTER_PCLK
ESR_SRI_I2C_PCLK
ESR_ADC_CLK
ESR_I2C_MS_PCLK
ESR_RSC_PCLK
ESR_EXTDMACNTR_PCLK
ESR_DIO2VPB0 _PCLK
ESR_DIO2VPB1_PCLK
ESR_I2SIN_1 _PCLK
ESR_I2SIN_2 _PCLK
ESR_I2SOUT_1 _PCLK
ESR_I2SOUT_2_PCLK
ESR_ADSS _PCLK
ESR_AUDIO_CONFIG _PCLK
ESR_SPDIF _PCLK
ESR_SRI _PCLK
ESR_FRAMESYNCREF
ESR_CR_I2SIN_2_BCK
ESR_CR_I2SIN_1_BCK
ESR_CR_I2SOUT_BCK
ESR_CR_I2SIN_2_WS
ESR_CR_I2SIN_1_WS
ESR_CR_I2SOUT_WS
ESR_SDAC_NS_CLK
ESR_SDAC_DSPCLK
ESR_SADC_DECCLK
ESR_SADC_SYSCLK
ESR_DCDC_CONVERTER_CLK enable fraction divider for DC-to-DC converter clock
ESR_SPDIF_BCK
no fractional divider supported for this clock
ESR_I2SIN_1_BCK
no fractional divider supported for this clock
ESR_I2SIN_2_BCK
no fractional divider supported for this clock
ESR_I2SOUT_BCK
no fractional divider supported for this clock
ESR_SRI_GCC_SHO
no fractional divider supported for this clock
enable fraction divider for UART clock
enable fraction divider for VPB1 bus clock
enable fraction divider for UART bus clock
enable fraction divider for DEBOUNCE bus clock
enable fraction divider for CGU bus clock
enable fraction divider for WDOG bus clock
enable fraction divider for control ADC bus clock
enable fraction divider for IO configuration bus clock
enable fraction divider for event router bus clock
enable fraction divider for SRI I
2
C-bus clock
enable fraction divider for control ADC system clock
enable fraction divider for M/S I
2
C-bus clock
enable fraction divider for RSC bus clock
enable fraction divider for external DMA controller clock
enable fraction divider for DIO2VPB0 bus clock
enable fraction divider for DIO2VPB1 bus clock
enable fraction divider for I2SIN_1 bus clock
enable fraction divider for I2SIN_2 bus clock
enable fraction divider for I2SOUT_1 bus clock
enable fraction divider for I2SOUT_2 bus clock
enable fraction divider for ADSS bus clock
enable fraction divider for audio configuration bus clock
enable fraction divider for SPDIF bus clock
enable fraction divider for SRI bus clock
enable fraction divider for SRI frame sync reference
enable fraction divider for I2SIN_2 bit clock
enable fraction divider for I2SIN_1 bit clock
enable fraction divider for I2SOUT bit clock
enable fraction divider for I2SIN_2 word select
enable fraction divider for I2SIN_1 word select
enable fraction divider for I2SOUT word select
enable fraction divider for SDAC new sample
enable fraction divider for SDAC DSP clock
enable fraction divider for SADC decimation filter clock
enable fraction divider for SADC system clock
Table 11:
Base address Offset
VPB0 bridge interface description
…continued
Key
Description
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| SAA8200HL/N100,518 | 制造商:ST-Ericsson 功能描述:SAA8200HL Series Ensation Base Integrated Wireless Audio Baseband - LQFP-100 |
| SAA8510EV1UM | 制造商:STMicroelectronics 功能描述: |
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| SA-A871-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
| SA-A877-FREQ | 制造商:NEL 制造商全稱:Nel Frequency Controls,inc 功能描述:Positive ECL (PECL) |
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