245304-003
Datasheet
iii
Pentium
III Processor Mobile Module MMC-2
Contents
1.0
Introduction.........................................................................................................................1
1.1
References............................................................................................................1
2.0
Architecture Overview........................................................................................................2
3.0
Signal Information ..............................................................................................................4
3.1
Signal Definitions...................................................................................................4
3.1.1
Signal List.................................................................................................5
3.1.2
Memory Signal Description ......................................................................6
3.1.3
AGP Signals.............................................................................................7
3.1.4
PCI Signals...............................................................................................9
3.1.5
Processor and PIIX4E/M Sideband Signals...........................................11
3.1.6
Power Management Signals ..................................................................12
3.1.7
Clock Signals..........................................................................................13
3.1.8
Voltage Signals ......................................................................................14
3.1.9
ITP and JTAG Pins.................................................................................15
3.1.10 Miscellaneous Pins.................................................................................15
3.2
Connector Pin Assignments................................................................................16
3.3
Pin and Pad Assignments...................................................................................18
4.0
Functional Description......................................................................................................20
4.1
Pentium III Processor Mobile Module MMC-2.....................................................20
4.2
L2 Cache.............................................................................................................20
4.3
The 82443BX Host Bridge System Controller.....................................................20
4.3.1
Memory Organization.............................................................................20
4.3.2
Reset Strap Options...............................................................................21
4.3.3
PCI Interface ..........................................................................................21
4.3.4
AGP Interface.........................................................................................22
4.4
Power Management............................................................................................22
4.4.1
Clock Control Architecture......................................................................22
4.4.1.1 Normal State .............................................................................24
4.4.1.2 Auto Halt State ..........................................................................24
4.4.1.3 Stop Grant State........................................................................25
4.4.1.4 Quick Start State .......................................................................25
4.4.1.5 HALT/Grant Snoop State ..........................................................26
4.4.1.6 Sleep State................................................................................26
4.4.1.7 Deep Sleep State ......................................................................26
4.5
Power Consumption in Power Management Mode.............................................27
5.0
Electrical Specifications....................................................................................................28
5.1
System Bus Clock Signal Quality Specifications.................................................28
5.1.1
BCLK DC Specifications.........................................................................28
5.1.2
BCLK AC Specifications.........................................................................28
5.2
System Power Requirements..............................................................................30
5.3
Processor Core Voltage Regulation....................................................................30
5.3.1
Voltage Regulator Efficiency..................................................................30
5.3.2
Voltage Regulator Control......................................................................32