Pentium
II
Processor with On-Die Cache – Low-Power Module
Datasheet
7
1.0
Introduction
This document provides the technical information for integrating the Intel
Pentium
II Processor
with On-Die Cache – Low-Power Module into the latest applied computing systems.
Building around this design gives the system manufacturer these advantages:
Avoids complexities associated with designing high-speed processor core logic boards.
Provides an upgrade path from previous Intel modules using a standard interface.
2.0
Architecture Overview
A highly integrated assembly, the Low-Power Module contains the Pentium II Processor with On-
Die Cache – Low Power core and its immediate system-level support. The Low-Power Module is
offered with a core speed of 333 MHz. All processor speeds have a 66-MHz processor system bus
(PSB) speed.
The PIIX4E PCI/ISA IDE Xcelerator bridge is one of two large-scale integrated devices of the
Intel
440BX AGPset. A design’s system electronics must include a PIIX4E device to connect to
the Low-Power Module. The PIIX4E provides extensive power management capabilities and
supports the Intel
82443BX Host Bridge/Controller, the second integrated device. Key features of
the 82443BX Host Bridge/Controller include the DRAM controller, which supports EDO at 3.3 V
with a burst read at 7-2-2-2 (60 nanoseconds) or SDRAM at 3.3 V with a burst read at 8-1-1-1
(66 MHz, CL=2). The 82443BX Host Bridge/Controller also provides a PCI CLKRUN# signal to
request the PIIX4E to regulate the PCI clock on the PCI bus. The 82443BX clock enables Self
Refresh mode of EDO or SDRAM during Suspend mode and is compatible with SMRAM
(C_SMRAM) and Extended SMRAM (E_SMRAM) modes of power management. E_SMRAM
mode supports write-back cacheable SMRAM up to 1 Mbyte.
A thermal transfer plate (TTP) on the 82443BX Host Bridge/Controller and the processor provides
heat dissipation and a thermal attach point for the system manufacturer’s thermal solution.
An on-board voltage regulator converts the system DC voltage to the processor’s core and I/O
voltage. Isolating the processor voltage requirements allows the system manufacturer to
incorporate different processor variants into a single system.
Supporting input voltages from 5 V to 21 V, the processor core voltage regulation enables an above
80 percent peak efficiency and decouples processor voltage requirements from the system.
The Low-Power Module also incorporates Active Thermal Feedback (ATF) sensing, compliant to
the
ACPI Specification Rev 1.0
. A system management bus (SMBus) supports the internal and
external temperature sensing with programmable trip points.
Figure 1 illustrates the block diagram of the module.