參數(shù)資料
型號: Pentium II 333
廠商: Intel Corp.
英文描述: Processor with On-Die Cache Low-Power Module(帶片上緩存低能量模塊的處理器)
中文描述: 而對整個(gè)處理器模高速緩存低功率模塊(帶片上緩存低能量模塊的處理器)
文件頁數(shù): 22/50頁
文件大小: 1123K
代理商: PENTIUM II 333
Pentium
II
Processor with On-Die Cache – Low-Power Module
22
Datasheet
Table 14 summarizes some of the key specifications for the connector.
4.0
Functional Description
4.1
Pentium
II
Processor With On-Die Cache – Low-Power
Module
The module is offered at a core speed of 333 MHz, with a 66-MHz processor system bus speed.
4.2
L2 Cache
The on-die L2 cache is 256 Kbytes, is four-way set associative, and runs at the speed of the
processor core.
4.3
The 82443BX Host Bridge/Controller
Intel’s 82443BX Host Bridge/Controller is a highly integrated device that combines the bus
controller, the DRAM controller, and the PCI bus controller into one component. The 82443BX
Host Bridge/Controller has multiple power management features designed specifically for low-
power systems such as:
CLKRUN#, a feature that enables controlling of the PCI clock on or off.
The 82443BX Host Bridge/Controller suspend modes, which include Suspend-to-RAM
(STR), Suspend-to-Disk (STD), and Power-On-Suspend (POS).
System Management RAM (SMRAM) power management modes, which include Compatible
SMRAM (C_SMRAM) and Extended SMRAM (E_SMRAM). C_SMRAM is the traditional
SMRAM feature implemented in all Intel PCI chipsets. E_SMRAM is a new feature that
supports write-back cacheable SMRAM space up to 1 Mbyte. To minimize power
Table 14. Connector Specifications
Parameter
Condition
Specification
Material
Contact
Copper Alloy
Housing
Thermo Plastic Molded Compound: LCP
Electrical
Current
0.5 A
Voltage
50 VAC
Insulation Resistance
100 M
minimum at 500 VDC
Termination Resistance
10 m
maximum
Capacitance
5 pF maximum per contact
Mechanical
Mating Cycles
50 cycles
Connector Mating Force
2.0 oz maximum per contact
Contact Unmating Force
1.5 oz minimum per contact
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