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參數(shù)資料
| 型號： | NS32FX100VF |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | System Controller |
| 中文描述： | 系統(tǒng)控制器 |
| 文件頁數(shù)： | 64/94頁 |
| 文件大?。?/td> | 955K |
| 代理商： | NS32FX100VF |
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4.0 Device Specifications
(Continued)
4.1.3 Output Signals
(Continued)
Signal
Pin Numbers
Description
SDIS/DMAK2
27
DischargeD
Output signal used by the scanner to prepare for the next pixel or DMA
AcknowledgeDOutput for DMA channel 2 acknowledge or general purpose output
pin.
SDOUT
20
Sigma-Delta Data OutD
Input to the SDC analog transmitter.
SEL0
SEL1
SEL3
108
110
107
Zone SelectD
Used to address the device according to the selected zone.
SLS
21
Scanner Line SyncD
Output signal used to indicate beginning of scan or general
purpose output pin.
SMPH0–3
70
67
69
68
Scanner Motor PhasesD
Four phase signals for driving the scanner motor.
SOSCO
63
Low-Speed Oscillator OutD
Asynchronous. This line is used as the return path for
the crystal (if used).
SPDW
23
Peak Detector WindowD
Output to the scanner ABC circuit or general purpose
output pin.
STB0–3
35
30
34
31
StrobesD
Thermal print head strobes output or general purpose output pin.
WDT
60
WATCHDOG TrapD
Traps CPU execution when WATCHDOG detects error.
WE0
WE1
113
112
Write EnableD
Used by the addressed device to gate the data from the data bus.
WE0 for even and WE1 for odd bytes.
4.1.4 Input/Output Signals
Signal
Pin Numbers
Description
A16–23
7
10
14
8
12
15
9
13
High Order Address BusD
The most significant eight bits of the CPU address bus.
Output from the NS32FX100 during DMA cycles.
AD0–15
120
123
127
130
2
6
121
124
128
132
3
122
126
129
1
4
Address/Data busD
Multiplexed address/data information.
ADS
118
Address StrobeD
Controls memory access, and signals the beginning of a bus
cycle. Output from the NS32FX100 during DMA cycles.
DDIN
119
Data Direction InD
Indicates the direction of data transfer during a bus cycle. Output
from the NS32FX100 during DMA cycles.
MWSO
47
MICROWIRE Serial OutD
Serial output data for communication via the MICROWIRE
protocol or general purpose I/O pin.
PCLK/DMRQ1
49
Printer Bitmap Shift ClockD
Output from the internal clock or asynchronous input
from an external clock (NS32FX200 only) or input for DMA channel 1 request or
general purpose I/O pin.
PIO0–1
54
53
General Purpose I/O Pins.
SBYPS/DMRQ2
48
Scanner Pixel BypassD
Input to pixel generator for external video enhancement
device (NS32FX200 only) or last sampled pixel output or DMA RequestDInput for
DMA channel 2 request or general purpose I/O pin. (SBYPS in NS32FX200 only.)
SNH/DMRQ0
52
Sample and HoldD
Output to scanner sample and hold circuit or DMA RequestD
input for DMA channel 0 request or general purpose I/O pin.
UREN
45
UART Receive EnableD
Output or general purpose I/O pin.
UTXD
46
UART TransmitD
Output or general purpose I/O pin.
64
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