參數(shù)資料
型號: NS32FX100VF
廠商: National Semiconductor Corporation
英文描述: System Controller
中文描述: 系統(tǒng)控制器
文件頁數(shù): 26/94頁
文件大?。?/td> 955K
代理商: NS32FX100VF
2.0 Architecture
(Continued)
Strobes Generator
A train of strobes consists of two or four strobes depending
on the strobes mode. The train of strobe pulses starts on
the time slot pre-defined in the Printer Strobes-Start Time
Slot (PSTSL) register. The train of strobe pulses starts with
a strobe-on interval, followed by a sequence of strobe-off
and strobe-on intervals. The duration of the strobe-on inter-
val is controlled by the STBON register and the duration of
the strobe-off interval is controlled by the STBOFF register.
The strobe-on and strobe-off intervals may be programmed
while the strobe pulses are being generated. After the last
strobe-on interval is completed, a Strobes-Done interrupt
pulse is generated. The interrupt is periodic, occurring when
the pre-defined time slot is reached and the train of strobe
pulses is completed.
Strobing pulses are generated on the STB0–3 output pins, if
enabled by the STBEN bit of the Thermal Print-Head Con-
trol (TPHC) register. After the last strobe-on interval is com-
pleted, the STBEN bit is automatically cleared by hardware.
To prevent losing strobe pulses, the software should verify
that the bit is cleared before setting it to ‘‘1’’.
The strobing mode defines both the number of strobes in a
train and the distribution of strobes among the STB0–3
pins. Two strobing modes are supported, Two-Strobes
mode and Four-Strobes mode. The Strobe Mode (STBM)
field of the TPHC register selects the strobing mode to be
used.
The two strobing modes are shown in Figure 2-12 and Fig-
ure 2-13 for TPHC.SPOL
e
1. Note that ‘‘Start’’ is the begin-
ning of the time slot and ‘‘Done’’ is the Strobes-Done event.
TL/EE/11331–17
FIGURE 2-12. Four Strobes Mode (STBM
e
00)
TL/EE/11331–18
FIGURE 2-13. Two Strobes Mode (STBM
e
01)
26
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