參數(shù)資料
型號: MSC8102M4000
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 32-BIT, 75 MHz, OTHER DSP, CBGA431
封裝: 20 X 20 MM, FLIP CHIP, CERAMIC, BGA-431
文件頁數(shù): 48/96頁
文件大?。?/td> 1557K
代理商: MSC8102M4000
2-22
AC Timings
2.6.11 JTAG Signals
Table 2-22. JTAG Timing
No.
Characteristics
All frequencies
Unit
Min
Max
700
TCK frequency of operation (1/(T
C ×
3); maximum 22 MHz)
0.0
22.0
MHz
701
TCK cycle time
45.0
ns
702
TCK clock pulse width measured at VM = 1.6 V
21.0
ns
703
TCK rise and fall times
0.0
3.0
ns
704
Boundary scan input data set-up time
5.0
ns
705
Boundary scan input data hold time
24.0
ns
706
TCK low to output data valid
0.0
40.0
ns
707
TCK low to output high impedance
0.0
40.0
ns
708
TMS, TDI data set-up time
5.0
ns
709
TMS, TDI data hold time
25.0
ns
710
TCK low to TDO data valid
0.0
44.0
ns
711
TCK low to TDO high impedance
0.0
20.0
ns
712
TRST assert time
100.0
ns
713
TRST set-up time to TCK low
40.0
ns
Note:
All timings apply to OnCE module data transfers as the OnCE module uses the JTAG port as an interface.
Figure 2-16. Test Clock Input Timing Diagram
TCK
(Input)
VM
VIH
VIL
701
702
703
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