參數(shù)資料
型號(hào): MSC8102M4000
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 32-BIT, 75 MHz, OTHER DSP, CBGA431
封裝: 20 X 20 MM, FLIP CHIP, CERAMIC, BGA-431
文件頁數(shù): 42/96頁
文件大?。?/td> 1557K
代理商: MSC8102M4000
2-17
AC Timings
2.6.6 TDM Timing
Table 2-17. TDM Timing
Number
Characteristic
Expression
Minimum Maximum
Units
300
TDMxRCLK/TDMxTCLK
TC1
20
ns
301
TDMxRCLK/TDMxTCLK High Pulse Width
(0.5
± 0.1) × TC
8
ns
302
TDMxRCLK/TDMxTCLK Low Pulse Width
(0.5
± 0.1) × TC
8
ns
303
TDM receive all input Setup time
2.5
ns
304
TDM receive all input Hold time
2.5
ns
305
TDMxTCLK High to TDMxTDAT/TDMxRCLK
output active2,3
3—
ns
306
TDMxTCLK High to TDMxTDAT/TDMxRCLK
output valid
2,3
—12
ns
307
All output hold time
2
4—
ns
308
TDMxTCLK High to TDmXTDAT/TDMxRCLK
output high impedance2,3
—11
ns
309
TDMxTCLK High to TDMXTSYN output valid2
—11
ns
310
TDMxTSYN output hold time2
3.9
ns
Notes:
1.
Values are based on a frequency range of 9–50 MHz.
2.
Values are based on 30 pF capacitive load.
3.
When configured as an output, TDMxRCLK acts as a second data link. See Chapter 22 of the
MSC8102 Reference Manual for details.
Figure 2-9. TDM Inputs Signals
Figure 2-10. TDM Output Signals
TDMxRCLK
TDMxRDAT
TDMxRSYN
300
301
302
303
304
TDMxTCLK
TDMxTDAT
~ ~
TDMxTSYN
~ ~
305
306
308
307
300
301
302
310
309
TDMxRCLK
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