參數(shù)資料
型號： MCC501RX200TD0B
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA838
封裝： BGA-838
文件頁數(shù)： 38/102頁
文件大?。?/td> 1929K
代理商： MCC501RX200TD0B
January 21, 2002— Preliminary Version
C-Port Confidential
40
CHAPTER 2: SIGNAL DESCRIPTIONS
When configuring two C-5 network processors back-to-back using the Fabric Port, set up
the transmit side of each C-5 network processor in Utopia ATM mode and the receive side
of each C-5 network processor in Utopia PHY mode.
FRXCTL6
Input
TxPrty
FTXCTL6
Output
RxPrty
* cell size must be 4Byte aligned.
Table 18 Utopia1*, 2*, 3 PHY Mode, C-5 Network Processor to Fabric Interface Pin Mapping
Receive Signals
Transmit Signals
C-5 Network
Processor
I/O
Utopia
Note
C-5 Network
Processor
I/O
Utopia
Note
Table 19 PRIZMA Mode, C-5 Network Processor to Fabric Interface Pin Mapping
Receive Signals
Transmit Signals
C-5 Network
Processor
I/O
Utopia
Note
C-5 Network
Processor
I/O
Utopia
Note
FRXCTL0
Input
TxEnb*
pulldown
(not connected to
fabric)
FTXCTL0
Input
RxEnb*
pulldown
(not connected to
fabric)
FRXCTL1
Output
TxClav
nc
FTXCTL1
Output
RxClav
nc
FRXCTL2
Input
TxSOP
Pulldown
FTXCTL2
Output
RxSOP
Pulldown
FRXCTL3
Input
n/a
Pullup or
Pulldown
FTXCTL3
nc
FRXCTL4
Input
n/a
Pullup or
Pulldown
FTXCTL4
nc
FRXCTL5
Input
n/a
Pullup or
Pulldown
FTXCTL5
nc
FRXCTL6
Input
TxPrty or nc
FTXCTL6
Output
RxPrty or nc
Table 20 Power X Mode, C-5 Network Processor to Fabric Interface Pin Mapping
Receive Signals
Transmit Signals
C-5 Network
Processor
I/O
Power X
Note
C-5 Network
Processor
I/O
Power X
Note
FRXCTL0
Input
RxCtrl[0]
Pulldown
FTXCTL0
Output
TxCtrl[0]
Pulldown or nc
FRXCTL1
Input
RxCtrl[1]
Pulldown
FTXCTL1
Output
TxCtrl[1]
Pulldown or nc
FRXCTL2
Input
RxCtrl[2]
Pulldown
FTXCTL2
Output
TxCtrl[2]
Pulldown or nc
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