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參數(shù)資料
| 型號： | MCC501RX200TD0B |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA838 |
| 封裝： | BGA-838 |
| 文件頁數(shù)： | 25/102頁 |
| 文件大小： | 1929K |
| 代理商： | MCC501RX200TD0B |
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C-Port Confidential
Preliminary Version — January 21, 2002
Pin Descriptions Grouped by Function
29
Gigabit Ethernet and Fibre Channel TBI Configuration
1000BASE-T Gigabit Ethernet and Fibre Channel TBI is implemented in much the same
way as Gigabit Ethernet (GMII). Table 7 shows the possible CP pin combinations you can
the signals and pinouts for a single cluster for Gigabit Ethernet and Fibre Channel TBI.
CPn+1_6
Table 4 1
LVTTL
O
TX_ER
Transmit Error. Asserting TX_ER when TX_EN is a 1 causes
transmission of the designated “bad code” in lieu of the normal
encoded data on the twisted pair data.
CPn+2_0
Table 4 1
nc
CPn+2_1
Table 4 1
LVTTL
I
RCLK
Receive Clock (125MHz)
CPn+2_2
Table 4 1
LVTTL
I
RXD(0)
Receive Data (byte-wide receive data, least significant bit)
CPn+2_3
Table 4 1
LVTTL
I
RXD(1)
Receive Data
CPn+2_4
Table 4 1
LVTTL
I
RXD(2)
Receive Data
CPn+2_5
Table 4 1
LVTTL
I
RXD(3)
Receive Data
CPn+2_6
Table 4 1
LVTTL
I
RX_DV
Receive Data Valid. Indicates that there is a receive frame in progress
and that the data present on the RXD signals is valid.
CPn+3_0
Table 4 1
nc
CPn+3_1
Table 4 1
LVTTL
I
CRS
Carrier Sense. Indicates traffic is on the link. CRS is asserted when a
non-idle condition is detected on the receive data stream. CRS is
deasserted when an end of frame or idle condition is detected.
CPn+3_2
Table 4 1
LVTTL
I
RXD(4)
Receive Data
CPn+3_3
Table 4 1
LVTTL
I
RXD(5)
Receive Data
CPn+3_4
Table 4 1
LVTTL
I
RXD(6)
Receive Data
CPn+3_5
Table 4 1
LVTTL
I
RXD(7)
Receive Data (most significant bit)
CPn+3_6
Table 4 1
LVTTL
I
RX_ER
Receive Error Detected. Indicates that there has been an error
received in the receive frame.
Total Pins
28
* n can be 0, 4, 8, or 12.
Reference Table 4 for pin numbers for the actual cluster(s) you are configuring.
Table 8 Gigabit Ethernet (GMII/MII) Signals One Cluster Example (continued)
Signal Name* Pin # Total
Type
I/O
Label
Signal Description
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