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| 型號： | MC68HLC705KJ1CDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 77/117頁 |
| 文件大?。?/td> | 1644K |
| 代理商： | MC68HLC705KJ1CDW |
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Low-Power Modes
Data Sheet
MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 4.0
62
Low-Power Modes
MOTOROLA
After exit from stop mode by reset:
The COP watchdog counter immediately begins counting from $0000.
The COP watchdog counter is cleared at the end of the oscillator
stabilization delay and begins counting from $0000 again.
6.3.3.2 WAIT
The WAIT instruction has no effect on the COP watchdog.
NOTE:
To prevent a COP timeout during wait mode, exit wait mode periodically to service
the COP.
6.3.4 Timer
Effects of STOP and WAIT on the timer are discussed here.
6.3.4.1 STOP
The STOP instruction:
Clears the RTIE, TOFE, RTIF, and TOF bits in the timer status and control
register, disabling timer interrupt requests and removing any pending timer
interrupt requests
Disables the clock to the timer
After exiting stop mode by external interrupt, the timer immediately resumes
counting from the last value before the STOP instruction and continues counting
throughout the oscillator stabilization delay.
After exiting stop mode by reset and after the oscillator stabilization delay, the timer
resumes operation from its reset state.
6.3.4.2 WAIT
The WAIT instruction has no effect on the timer.
6.3.5 EPROM/OTPROM
Effects of STOP and WAIT on the EPROM/OTPROM are discussed here.
6.3.5.1 STOP
The STOP instruction during EPROM programming clears the EPGM bit in the
EPROM programming register, removing the programming voltage from the
EPROM.
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