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參數(shù)資料
| 型號： | MC68HLC705KJ1CDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 44/117頁 |
| 文件大?。?/td> | 1644K |
| 代理商： | MC68HLC705KJ1CDW |
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Computer Operating Properly Module (COP)
Data Sheet
MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 4.0
32
Computer Operating Properly Module (COP)
MOTOROLA
3.3.2 COP Watchdog Timeout Period
The COP watchdog timer function is implemented by dividing the output of the
real-time interrupt circuit (RTI) by eight. The RTI select bits in the timer status and
control register control RTI output, and the selected output drives the COP
watchdog. (See timer status and control register in Section 9. Multifunction
NOTE:
The minimum COP timeout period is seven times the RTI period. The COP is
cleared asynchronously with the value in the RTI divider; hence, the COP timeout
period will vary between 7x and 8x the RTI period.
3.3.3 Clearing the COP Watchdog
To clear the COP watchdog and prevent a COP reset, write a logic 0 to bit 0
(COPC) of the COP register at location $07F0 (see Figure 3-1). Clearing the COP
bit disables the COP watchdog timer regardless of the IRQ/VPP pin voltage.
If the main program executes within the COP timeout period, the clearing routine
should be executed only once. If the main program takes longer than the COP
timeout period, the clearing routine must be executed more than once.
NOTE:
Place the clearing routine in the main program and not in an interrupt routine.
Clearing the COP watchdog in an interrupt routine might prevent COP watchdog
timeouts even though the main program is not operating properly.
3.4 Interrupts
The COP watchdog does not generate interrupts.
3.5 COP Register
The COP register (COPR) is a write-only register that returns the contents of
EPROM location $07F0 when read.
COPC — COP Clear Bit
This write-only bit resets the COP watchdog. Reading address $07F0 returns
undefined results.
Address:
$07F0
Bit 7
654321
Bit 0
Read:
Write:
COPC
Reset:
UUUUUUU
0
= Unimplemented
U = Unaffected
Figure 3-1. COP Register (COPR)
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