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參數(shù)資料
| 型號(hào)： | MC68HLC705KJ1CDW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁(yè)數(shù)： | 43/117頁(yè) |
| 文件大?。?/td> | 1644K |
| 代理商： | MC68HLC705KJ1CDW |
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MC68HC705KJ1MC68HRC705KJ1MC68HLC705KJ1 — Rev. 4.0
Data Sheet
MOTOROLA
Computer Operating Properly Module (COP)
31
Data Sheet — MC68HC705KJ1
Section 3. Computer Operating Properly Module (COP)
3.1 Introduction
The computer operating properly (COP) watchdog resets the MCU in case of
software failure. Software that is operating properly periodically services the COP
watchdog and prevents COP reset. The COP watchdog function is programmable
by the COPEN bit in the mask option register.
3.2 Features
The computer operating properly module (COP) includes these features:
Protection from runaway software
Wait mode and halt mode operations
3.3 Operation
Operation of the COP module is discussed here.
3.3.1 COP Watchdog Timeout
Four counter stages at the end of the timer make up the COP watchdog. The COP
resets the MCU if the timeout period occurs before the COP watchdog timer is
cleared by application software and the IRQ/VPP pin voltage is between VSS and
VDD. Periodically clearing the counter starts a new timeout period and prevents
COP reset. A COP watchdog timeout indicates that the software is not executing
instructions in the correct sequence.
NOTE:
The internal clock drives the COP watchdog. Therefore, the COP watchdog cannot
generate a reset for errors that cause the internal clock to stop.
The COP watchdog depends on a power supply voltage at or above a minimum
specification and is not guaranteed to protect against brownout.
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