參數(shù)資料
型號(hào): MC68HC08LT8CFGE
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.40 MM THICKNESS, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BCB, LQFP-44
文件頁數(shù): 4/156頁
文件大?。?/td> 1107K
代理商: MC68HC08LT8CFGE
Port C
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
101
PTC[7:0] — Port C Data Bits
These read/write bits are software programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on port C data.
FP[24:19] — LCD Driver Frontplanes 24–19
FP[24:19] are pins used for the frontplane output of the LCD driver module. The enable bits, PCEH
and PCEL, in the CONFIG2 register, and LCDE bit in the LCDCR register determine whether the
PTC5/FP24–PTC4/FP23 and PTC3/FP22–PTC0/FP19 pins are LCD frontplane driver pins or
9.4.2 Data Direction Register C (DDRC)
Data direction register C determines whether each port C pin is an input or an output. Writing a logic 1 to
a DDRC bit enables the output buffer for the corresponding port C pin; a logic 0 disables the output buffer.
NOTE
For devices packaged in a 44-pin package, PTC4–PTC5 are not
connected. DDRC4:5 should be set to a 1 to configure PTC4–PTC5 as
outputs.
DDRC[7:0] — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC[7:0], configuring all port C pins
as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1. Figure 9-11 shows the
port C I/O logic.
Figure 9-11. Port C I/O Circuit
Address:
$0006
Bit 7
6
54
32
1
Bit 0
Read:
DDRC7
DDRC6
DDRC5
DDRC4
DDRC3
DDRC2
DDRC1
DDRC0
Write:
Reset:
000
00
000
Figure 9-10. Data Direction Register C (DDRC)
READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
READ PTC ($0002)
PTCx
DDRCx
PTCx
INT
ERNAL
D
AT
A
B
US
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