參數(shù)資料
型號： MC68HC08LT8CFGE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, 1.40 MM THICKNESS, 0.80 MM PITCH, ROHS COMPLIANT, MS-026BCB, LQFP-44
文件頁數(shù)： 110/156頁
文件大小： 1107K
代理商： MC68HC08LT8CFGE
Functional Description
MC68HC08LT8 Data Sheet, Rev. 1
Freescale Semiconductor
57
Addr.
Register Name
Bit 7
654321
Bit 0
$0020
TIM1 Status and Control
Register
(T1SC)
Read:
TOF
TOIE
TSTOP
00
PS2
PS1
PS0
Write:
0
TRST
Reset:
00100000
$0021
TIM1 Counter Register
High
(T1CNTH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
00000000
$0022
TIM1 Counter Register
Low
(T1CNTL)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
00000000
$0023
TIM Counter Modulo
Register High
(TMODH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
11111111
$0024
TIM1 Counter Modulo
Register Low
(T1MODL)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
11111111
$0025
TIM1 Channel 0 Status
and Control Register
(T1SC0)
Read:
CH0F
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
Write:
0
Reset:
00000000
$0026
TIM1 Channel 0
Register High
(T1CH0H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$0027
TIM1 Channel 0
Register Low
(T1CH0L)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
Indeterminate after reset
$0028
TIM1 Channel 1 Status
and Control Register
(T1SC1)
Read:
CH1F
CH1IE
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
Write:
0
Reset:
00000000
$0029
TIM1 Channel 1
Register High
(T1CH1H)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
Indeterminate after reset
$002A
TIM1 Channel 1
Register Low
(T1CH1L)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
Indeterminate after reset
$002B
TIM2 Status and Control
Register
(T2SC)
Read:
TOF
TOIE
TSTOP
00
PS2
PS1
PS0
Write:
0
TRST
Reset:
00100000
$002C
TIM2 Counter Register
High
(T2CNTH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
00000000
$002D
TIM2 Counter Register
Low
(T2CNTL)
Read:
Bit 7
654321
Bit 0
Write:
Reset:
00000000
$002E
TIM2 Counter Modulo
Register High
(T2MODH)
Read:
Bit 15
14
13
12
11
10
9
Bit 8
Write:
Reset:
11111111
= Unimplemented
Figure 6-2. TIM I/O Register Summary (Sheet 1 of 2)
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