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參數(shù)資料
| 型號： | M44C510-P40 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDIP40 |
| 封裝： | DIP-40 |
| 文件頁數(shù)： | 9/57頁 |
| 文件大小： | 1105K |
| 代理商： | M44C510-P40 |
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M44C510
TELEFUNKEN Semiconductors
Rev. A2, 13–Jan–98
17 (57)
2.2.1
Bidirectional Port 0 and Port 1
In this port type, the data direction register is not indepen-
dently software programmable because the direction of
the complete port is switched automatically when an I/O
instruction occurs (see figure 13). The port can be
switched to output mode with an OUT instruction and to
input with an IN instruction. The data written to a port will
be stored into the output data latches and appears immedi-
ately at the port pin following the OUT instruction. After
RESET, all output latches are set to ’1’ and the ports are
switched to input mode. An IN instruction reads the
condition of the associated pins.
Note
Care must be taken when switching these bidirectional
ports from output to input. The capacitive pin loading at
this port, in conjunction with the high resistance pull-ups,
may cause the CPU to read the contents of the output data
register rather than the external input state. This can be
avoided by using either of the following programming
techniques:
D Use two IN instructions and DROP the first data
nibble. The first IN switches the port from output to
input and the DROP removes the first invalid nibble.
The second IN reads the valid pin state.
D Use an OUT instruction followed by an IN instruction.
With the OUT instruction, the capacitive load is
charged or discharged depending on the optional
pull-up /pull-down configuration. Write a “1” for pins
with pull-up resistors, and a “0” for pins with pull-
down resistors.
OUT
IN
Reset
I/O Bus
D
R
S
Q
NQ
R
Master reset
PxDATy
*) Mask options
(Data out)
(Direction)
Port 1 only
BPxy
V
DD
*
Pull-up
*
Pull-down
*
V
DD
*
14020
Figure 13. Bidirectional Ports 0 and 1
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