參數(shù)資料
型號(hào)： M44C510-P40
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDIP40
封裝： DIP-40
文件頁(yè)數(shù)： 45/57頁(yè)
文件大?。?/td> 1105K
代理商： M44C510-P40
M44C510
TELEFUNKEN Semiconductors
Rev. A2, 13–Jan–98
5 (57)
ROM
BANK 0
(2K x 8 bit)
Basebank
Zero page
(not available)
BANK 1
(1K x 8 bit)
FFFh
7FFh
1FFh
000h
FFFh
BFFh
7FFh
Common base
bank address
area
1F0h
1F8h
010h
018h
000h
008h
020h
1E8h
1E0h
SCALL
addresses
140h
180h
040h
0C0h
008h
$AUTOSLEEP
$RESET
INT0
INT1
INT2
INT3
INT4
INT5
INT6
INT7
1E0h
1C0h
100h
080h
Z ero
pag e
000h
96 11517
Figure 4. ROM map of M44C510
The lowest user ROM address segment is taken up by a
512-byte zero page which contains predefined start
addresses for interrupt service routines and special sub-
routines
accessible
with
single-byte
instructions
(SCALL). The corresponding memory map is shown in
figure 4. Look-up tables of constants can also be held in
ROM and are accessed via the MARC4’s built-in TABLE
instruction.
ROM Banking
Bank switching is fully supported by the compiler for
customers programming with qFORTH. The MARC4
switches from one ROM bank to another by writing the
new bank number to the ROM Bank Register (RBR).
Conventional program space (power-up bank) resides in
ROM bank 0. Each ROM bank consists of a 4-KByte ad-
dress space whereby the lowest 2 KByte is common to all
banks, so that addresses between 000h and 7FFh always
accesses the same ROM data (see figure 4). When ROM
banking is used, the compiler will, if necessary, insert the
program code to save and restore the condition of the
RBR on bank switching.
1.2.2
RAM
The MARC4 contains 256 x 4-bit wide static random
access memory (RAM). It is used for the expression stack,
the return stack and data memory for variables and arrays.
The RAM is addressed by any of the four 8-bit wide RAM
address registers SP, RP, X and Y.
Expression Stack
The 4-bit wide expression stack is addressed with the
expression stack pointer (SP). All arithmetic, I/O and
memory reference operations take their operands from,
and return their result to the expression stack. The
MARC4 performs the operations with the top of stack
items (TOS and TOS-1). The TOS register contains the
top element of the expression stack and works in the same
way as an accumulator. This stack is also used for passing
parameters between subroutines and as a scratch pad area
for temporary storage of data.
Return Stack
The 12-bit wide return stack is addressed by the return
stack pointer (RP). It is used for storing return addresses
of subroutines, interrupt routines and for keeping loop
index counts. The return stack can also be used as a
temporary storage area.
The MARC4 instruction set supports the exchange of data
between the top elements of the expression stack and the
return stack. The two stacks within the RAM have a user-
definable location and maximum depth.
1.2.3
Registers
The MARC4 controller has seven programmable regis-
ters and one condition code register. They are shown in
figure 6.
Program Counter (PC)
The program counter (PC) is a 12-bit register that contains
the address of the next instruction to be fetched from the
ROM. Instructions currently being executed are decoded
in the instruction decoder to determine the internal micro
operations. For linear code (no calls or branches) the pro-
gram counter is incremented with every instruction cycle.
If a branch, call, return instruction or an interrupt is
executed, the program counter is loaded with a new
address. The program counter is also used with the
TABLE instruction to fetch 8-bit wide ROM constants.
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