參數(shù)資料
型號(hào)： M44C510-P40
廠商： ATMEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDIP40
封裝： DIP-40
文件頁(yè)數(shù)： 20/57頁(yè)
文件大?。?/td> 1105K
代理商： M44C510-P40
M44C510
TELEFUNKEN Semiconductors
Rev. A2, 13–Jan–98
27 (57)
2.5.1
General Timer/Counter Control Registers
With the exception of the Timer 0 Interrupt Status Regis-
ter (T0SR), all the timer/counter registers are indirectly
addressed using extended addressing as described in the
section “Addressing peripherals”. An overview of all reg-
ister and subport addresses is shown in table 4. The
Timer/Counter auxiliary register (TCSUB) holds the sub-
port address of the particular register about to be
accessed. Care has to be taken to ensure that this subport
access sequence is not interrupted.
Please refer to the ’HARDC510.SCR’ hardware interface
file as a programming guidline.
Timer/Counter Clock Control Register (TCCR)
Subport address (indirect write access): ’6’hex
Bit 3
Bit 2
Bit 1
Bit 0
TCCR
T1CL2
T1CL1
T0CL2
T0CL1
Reset value: 1111b
T0CL2, T0CL1 – Timer 0 Clock source select
T1CL2, T1CL1 – Timer 1 Clock source select
Table 12.Timer/Counter Clock Control Register (TCCR)
Code
3 2 1 0
Function
Direction (TDir)
BP40*
TIM1
x x 0 0
Timer 0 clock = SUBCL
out
x
x x 0 1
Timer 0 clock = SYSCL
out
x
x x 1 0
Timer 0 clock = Timer1 output (T1OUT connected internally)
out
x
x x 1 1
Timer 0 clock = T0IN0 ( BP40*)
in
x
0 0 x x
Timer 1 clock = SUBCL
x
out
0 1 x x
Timer 1 clock = SYSCL
x
out
1 0 x x
Timer 1 clock = Timer 0 output (T0OUT0 connected internally)
x
out
1 1 x x
Timer 1 clock = TIM1
x
in
*
if TCIO0 = low (connects Timer 0 to Port 4)
The Timer/Counter Clock Control Register (TCCR) controls the clock source to both Timer 0 and Timer 1 prescalers.
If an external clock source (on BP40 or TIM1) is selected, then the corresponding port direction is automatically
switched to input mode (see figure 23).
Note: The TCIO0 bit must be set low for the BP40 external timer/counter access.
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