參數(shù)資料
型號(hào)： M44C510-P40
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDIP40
封裝： DIP-40
文件頁(yè)數(shù)： 33/57頁(yè)
文件大?。?/td> 1105K
代理商： M44C510-P40
M44C510
TELEFUNKEN Semiconductors
Rev. A2, 13–Jan–98
39 (57)
Phase Measurement Mode
This mode allows the Timer 0 to measure the phase misalignment between two 1:1 mark space ratio input signals con-
nected to the BP40 and BP41 pins (see figure 35). The counter clock is gated with the phase misalignment period (tp),
during which time the counter increments with the selected clock frequency. This misalignment period is defined as
the period during which BP40 is high and BP41 is low. Capturing and resetting of the counter always takes place on
the rising edge of BP41. The measured value remains in the capture register until overwritten by the next measurement.
Interrupts can be generated by either an overflow condition or an end-of-measurement (’eom’) event. An ’eom’ event
signals the CPU that a new measured value is present in the capture register and can be read, if required.
T0IN1
(BP41)
T0IN0
(BP40)
”eom”
Interrupt
tp
Captures & resets timer
96 11544
Figure 35. Phase measurement
Position Measurement Mode
This mode is intended for the evaluation of positional sensors with biphase output signals. Figure 36 illustrates a typical
positional sensor system which delivers both incremental positional stepping signals and also directional information.
The direction can be deduced from the relative phase of the two signals. Therefore if BP40 is high on the rising edge
of BP41, the moving mask travels to the left and if it is low then it travels to the right. The direction (left/right) informa-
tion is used to set the direction of the up/down counter which enables the BP40 pulses to be counted. Assuming that
the system has been reset on a reference position, the counter will always hold the absolute current position of the mov-
ing mask. This can be read by the CPU if necessary. This mode is the only one in which the counter is allowed to
decrement. Therefore, in this case it is possible for both an underflow or an overflow to occur. The overflow interrupt
(if unmasked) will trigger on either of these conditions while the compare interrupt on the other hand will only trigger
if the counter is counting upwards. To differentiate between an overflow or underflow, the compare value can be set
to ’0’ hex, for example. An overflow would then set both the overflow and compare status flags while an underflow
sets the overflow status flag only.
T0IN1
(BP41)
T0IN0
(BP40)
Typical sensor
light
Static mask
Moving mask
T0IN0
T0IN1
left movement
right movement
Timer
N
N+1
N+2
N+3
N
N–1
N–2
N–3
96 11545
Figure 36. Position measurement mode
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