deveopmen
Rev.B2 for proof reading
Usage precaution
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
336
Timer A (pulse width modulation mode)
(1) The timer Ai interrupt request bit becomes
“
1
”
if setting operation mode of the timer in compliance with
any of the following procedures:
Selecting PWM mode after reset.
Changing operation mode from timer mode to PWM mode.
Changing operation mode from event counter mode to PWM mode.
Therefore, to use timer Ai interrupt (interrupt request bit), set timer Ai interrupt request bit to
“
0
”
after
the above listed changes have been made.
(2) Setting the count start flag to
“
0
”
while PWM pulses are being output causes the counter to stop
counting. If the TAi
OUT
pin is outputting an
“
H
”
level in this instance, the output level goes to
“
L
”
, and
the timer Ai interrupt request bit goes to
“
1
”
. If the TAi
OUT
pin is outputting an
“
L
”
level in this instance,
the level does not change, and the timer Ai interrupt request bit does not becomes
“
1
”
.
Timer B (timer mode, event counter mode)
(1) Reading the timer Bi register while a count is in progress allows reading, with arbitrary timing, the
value of the counter. Reading the timer Bi register while reloading gets
“
FFFF
16
”
. Reading the timer Bi
register after setting a value in the timer Bi register with a count halted but before the counter starts
counting gets a proper value.
Timer B (pulse period/pulse width measurement mode)
(1) If changing the measurement mode select bit is set after a count is started, the timer Bi interrupt
request bit goes to
“
1
”
.
(2) When the first effective edge is input after a count is started, an indeterminate value is transferred to
the reload register. At this time, timer Bi interrupt request is not generated.
(3) The value of the counter is indeterminate at the beginning of a count. Therefore, the timer Bi overflow
flag may go to
“
1
”
and timer Bi interrupt request may be generated during the interval between a count
start and an effective edge input.
Stop Mode and Wait Mode
(1) When returning from stop mode by hardware reset, RESET pin must be set to
“
L
”
level until main clock
oscillation is stabilized.
(2) When shifting to WAIT mode or STOP mode, the program stops after reading from the WAIT instruc-
tion and the instruction that sets all clock stop control bits to
“
1
”
in the instruction queue. Therefore,
insert a minimum of 4 NOPs after the WAIT instruction and the instruction that sets all clock stop
control bits to
“
1
”
in order to flush the instruction queue.