DMAC II
deveopmen
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
126
(1) Memory-to-memory transfer
Data can be transferred from any memory location in the 64-Kbyte space to any memory location in
the same space in one of the following four ways:
Transfer from a fixed address to another fixed address
Transfer from a fixed address to a variable address
Transfer from a variable address to a fixed address
Transfer from a variable address to another variable address
If variable address mode is selected, the transfer address is incremented for the next DMA II transfer
to be performed. When transferred in units of 8 bits, the transfer address is incremented by one; when
transferred in units of 16 bits, the transfer address is incremented by two. If the transfer source or
destination address exceeds 0FFFF
16
as a result of address incrementation, the transfer source or
destination address recycles back to 00000
16
.
(2) Immediate data transfer
Data is transferred as immediate data to any memory location in the 64-Kbyte space. A fixed or
variable address can be selected for the transfer destination address. Store the immediate data in the
DMAC II Index
’
s transfer source address. When transferring 8-bit immediate data, set the data in the
lower byte position of the transfer source address. (The upper byte is ignored.)
(3) Arithmetic transfer
Data in two memory locations of the 64-Kbyte space or immediate data and data in any memory
location of the 64-Kbyte space are added together and the result is transferred to any memory location
in the 64-Kbyte space. Set the memory location to be operated on or immediate data in the DMAC II
Index
’
s transfer source address field and the other memory location to be operated on in the DMAC II
Index
’
s operation address field. When performing this mode of transfer on two memory locations, a
fixed or variable address can be selected for the transfer source and transfer destination addresses. If
the transfer source address is chosen to be variable, the operation address also becomes variable.
When performing this mode of transfer on immediate data and any memory location, a fixed or vari-
able address can be selected for the transfer destination address.
Transfer modes
DMAC II supports single and burst transfers. Use the burst transfer select bit (bit 5) for transfer mode
setup in the DMAC II index to choose single or burst transfer mode. Use the DMAC II index transfer
counter to set the number of times a transfer is performed. Neither single transfer nor burst transfer is
performed if the value
“
0000
16
”
is set in the transfer counter.
(1) Single transfer
For a DMAC II transfer request, 8 or 16 bits of data (one transfer unit) is transferred once. If the
transfer source or transfer destination address is chosen to be variable, the next DMA II transfer is
performed on an incremented memory address.
The transfer counter is decremented by each DMA II transfer performed. When using the end-of-transfer
interrupt facility, an end-of-transfer interrupt is generated at the time the transfer counter reaches zero.