- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367493 > L84302 L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02 PDF資料下載
參數(shù)資料
| 型號： | L84302 |
| 元件分類： | 通用總線功能 |
| 英文描述： | L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02 |
| 中文描述： | L84302四100/10 Mbps的4端口以太網(wǎng)的遠(yuǎn)程監(jiān)控控制器/ SNMP管理處的技術(shù)手冊，4月2日 |
| 文件頁數(shù)： | 43/128頁 |
| 文件大小： | 997K |
| 代理商： | L84302 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當(dāng)前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
Functional Description
Copyright 1997-2002 by LSI Logic Corporation. All rights reserved.
43 of 128
April, 2002
3.9.4 Discard Output Indication
When a packet that is being receive/transmitted over the System
Interface has been automatically discarded, the TXRET and RXDC
output pins are asserted to indicate that the discard happened. TXRET
and RXDC are normally latched high when a discard takes place. TXRET
and RXDC for the selected port can be cleared low by asserting the
clearing pin, CLRTXERR, and CLRRXERR, respectively.
When TXRET and RXDC are asserted, all data is prevented from being
written to the transmit and receive FIFOs, respectively, as long as the
respective signals are latched high. When these signals are cleared, then
the respective FIFOs can be written to.
3.10 Receive Status Word
3.10.1 General
A 32-bit status word can be appended to the end of each receive data
packet and stored in the receive FIFO. This status word contains a byte
count and error information for the receive data packet.
3.10.2 Format and Bit Order
The format for the status word is shown in
Table 8
. The top 16-bits
contain the actual byte count for the packet, and the bottom 16-bits
contain the status information related to the packet.
Table 7
Receive Discard Conditions
Discard Condition
Description
Receive FIFO Overflow
Receive FIFO full.
CRC Error
Receive packet has CRC error.
Oversize Packet
Receive packet is greater than maximum packet size, exclusive of pream-
ble and SFD. Maximum packet size is programmable between 1518-1533
bytes.
Undersize Packet
Receive packet is less than 64 bytes, exclusive of preamble and SFD.
RXABORT Pin
RXABORT pin was asserted while receive packet was read out on System
Interface.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L8560 | Low-Power SLIC with Ringing |
| L8567 | SLIC for Peoples Republic of China Applications |
| L8567-32PLCC | Telecommunication IC |
| L8567-44PLCC | Telecommunication IC |
| L8574D | CAP 15PF 50V 5% C0G SMD-0402 TR-7-PA SN100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L8446-04 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-06 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-07 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-41 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
| L8446-42 | 制造商:HAMAMATSU 制造商全稱:Hamamatsu Corporation 功能描述:CW LASER DIODES |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。