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參數(shù)資料
| 型號(hào)： | L84302 |
| 元件分類： | 通用總線功能 |
| 英文描述： | L84302 Quad 100/10 Mbps 4-Port Ethernet Controller with RMON/SNMP Management Counters technical manual 4/02 |
| 中文描述： | L84302四100/10 Mbps的4端口以太網(wǎng)的遠(yuǎn)程監(jiān)控控制器/ SNMP管理處的技術(shù)手冊(cè)，4月2日 |
| 文件頁(yè)數(shù)： | 116/128頁(yè) |
| 文件大小： | 997K |
| 代理商： | L84302 |
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April, 2002
L84302 Quad 4-Port Ethernet Controller - Technical Manual
Copyright 1997-2002 by LSI Logic Corporation. All rights reserved.
Pin # 126, Description, RX FIFO Reads; 0 = Space Not Available,
has been changed to, 0 = Data Not Available
page 10
:
Section 1, “Pin Description”
Pin # 174, 197, 220, 243, Description; copy should now read, 1 =
Half Duplex, 0 = Full Duplex
Pin # 57, Description, copy has been changed.
Pin # 18 should be 1, 8
page 22
:
Section 3.3.4, “Transmit Write Operation”
Paragraph 3: reference to 0000 has been changed to 1111, and
RXTXBE[3:0] has been changed to RXTXBE[3:0].
page 21
:
Figure 4
, Frame Formats and Bit Ordering
Changes to Notes 2, and 4
page 25
:
Section 3.3.5, “Receive Read Operation”
Paragraph 2: copy has changed.
Paragraph 4: copy has changed, new
Table 3
has been added.
New paragraph added at end of section.
page 25
:
Section 3.3.5, “Receive Read Operation”
Paragraph 3: reference to 0000 has been changed to 1111, and
RXTXBE[3:0] has been changed to RXTXBE[3:0].
page 29
:
Section 3.4.5, “Interpacket Gap”
New paragraph added to end of section
page 43
:
Section 3.10.2, “Format and Bit Order”
New paragraph added to end of section
page 55
:
Section 3.17, “Reset”
New copy added to end of the section
page 56
:
Section 3.18.1, “General”
Paragraph 5: copy has been changed
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