參數(shù)資料
型號： L80227
廠商： LSI CORP
元件分類： 網(wǎng)絡接口
英文描述： 10BASE-T/100BASE-TX Ethernet Physical Layer Device (PHY)(10BASE-T/100BASE-TX 以太網(wǎng)物理層處理器)
中文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP64
封裝： LQFP-64
文件頁數(shù)： 55/158頁
文件大?。?/td> 1084K
代理商： L80227
Draft 6/5/00
End of Packet
2-35
Copyright 1999 by LSI Logic Corporation. All rights reserved.
2.4.2 10 Mbits/s
Because the idle period in 10 Mbits/s mode is defined to be when there
is no valid data on the TP inputs, the start of packet for 10 Mbits/s mode
is detected when the TP squelch circuit detects valid data. When the
start of packet is detected, CRS is asserted as described in
Section
2.3.2, “Controller Interface,” page 2-9
. See
Section 2.3.8.4, “Squelch (10
Mbits/s),” page 2-22
for details on the squelch algorithm.
2.5 End of Packet
This section describes end of packet operation for both the 100 Mbits/s
and 10 Mbits/s modes.
2.5.1 100 Mbits/s
The End of Stream Delimiter (ESD) indicates the end of packet for 100
Mbits/s mode. The ESD pattern consists of two /T/R/ 4B5B symbols
inserted after the end of the packet, as defined in IEEE 802.3 Clause 24
and shown in
Table 2.5
and
Figure 2.2
.
The 4B5B encoder generates the transmit ESD and inserts the /T/R/
symbols after the end of the transmit data packet, as shown in
Figure 2.2
.
The 4B5B decoder detects the ESD pattern when there are groups of 10
consecutive code bits (two 5B words) from the descrambler during valid
packet reception.
If the 10 consecutive code bits from the receiver during valid packet
reception consist of the /T/R/ symbols, the end of packet is detected,
data reception is terminated, the CRS and RX_DV pins are asserted, and
/I/I/ symbols are substituted in place of the /T/R/ symbols.
If 10 consecutive code bits from the receiver during valid packet
reception do not consist of /T/R/ symbols, but instead consist of /I/I/
symbols, the packet is considered to have been terminated prematurely
and abnormally, and the end of packet condition is signalled to the
controller interface.
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相關代理商/技術參數(shù)
參數(shù)描述
L80227/B 制造商:LSI Corporation 功能描述: 制造商:LSI Corporation 功能描述:L80227/B
L80227/BI 制造商:LSI Corporation 功能描述:L80227/BI
L80227FR 制造商:LAUREL ELECTRONICS 功能描述:Laureate 1/8 DIN multi-function counter / timer, universal 85-264 Vac power, two
L80227-I 制造商:LSI Corporation 功能描述:STD CELL ASIC
L80227-I-LEADFREE 制造商:LSI Corporation 功能描述:796000124413
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