參數(shù)資料
型號(hào): L80227
廠商: LSI CORP
元件分類: 網(wǎng)絡(luò)接口
英文描述: 10BASE-T/100BASE-TX Ethernet Physical Layer Device (PHY)(10BASE-T/100BASE-TX 以太網(wǎng)物理層處理器)
中文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封裝: LQFP-64
文件頁(yè)數(shù): 142/158頁(yè)
文件大小: 1084K
代理商: L80227
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Draft 6/5/00
A-8
Application Information
Copyright 1999 by LSI Logic Corporation. All rights reserved.
the device when the 10 Mb
its/
s mode or UTP120/STP150 modes are
selected.
Keep REXT as close to the REXT and GND pins as possible to reduce
noise pickup into the transmitter.
Because the TP output is a current source, capacitive and inductive
loading can reduce the output voltage from the ideal level. Thus, in actual
application, it might be necessary to adjust the value of the output
current to compensate for external loading. One way to adjust the TP
output level is to change the value of the external resistor connected to
REXT.
A.5 Transmitter Droop
The IEEE 802.3 specification has a transmit output droop requirement for
100BASE-TX. Because the L80227 TP output is a current source, it has
no perceptible droop by itself. However, the inductance of the transformer
added to the device transmitter output as shown in
Figure A.1
through
Figure A.3
causes droop to appear at the transmit interface to the TP
wire. If the transformer connected to the L80227 outputs meets the
requirements of
Table A.1
, the transmit interface to the TP cable then
meets the IEEE 802.3 droop requirements.
A.6 MII Controller Interface
The MII controller interface allows the L80227 to connect to any external
Ethernet controller without any glue logic, provided the external Ethernet
controller has an MII interface that complies with IEEE 802.3, as shown
in
Figure A.1
through
Figure A.3
.
A.6.1 Clocks
Standard Ethernet controllers with an MII use TX_CLK to clock data in
on TXD[3:0]. TX_CLK is specified in IEEE 802.3 and on the L80227 to
be an output. If a non-standard controller or other digital device is used
to interface to the L80227, there might be a need to clock TXD[3:0] into
the L80227 on the edges of an external master clock. The master clock,
in this case, would be an input to the L80227. To do this, use OSCIN as
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