參數資料
型號: L80227
廠商: LSI CORP
元件分類: 網絡接口
英文描述: 10BASE-T/100BASE-TX Ethernet Physical Layer Device (PHY)(10BASE-T/100BASE-TX 以太網物理層處理器)
中文描述: DATACOM, ETHERNET TRANSCEIVER, PQFP64
封裝: LQFP-64
文件頁數: 143/158頁
文件大小: 1084K
代理商: L80227
Draft 6/5/00
MII Controller Interface
A-9
Copyright 1999 by LSI Logic Corporation. All rights reserved.
the master clock input. Because OSCIN generates TX_CLK inside the
L80227, data on TXD[3:0] can be clocked into the L80227 on edges of
output clock TX_CLK or input clock OSCIN. In the case where OSCIN is
used as the input clock, a crystal is no longer needed on OSCIN, and
TX_CLK can be left open or used for some other purpose.
A.6.2 Output Drive
The digital outputs on the L80227 controller signals meet the MII driver
characteristics specified in IEEE 802.3 and shown in
Figure A.4
if
external 24.9
1% termination resistors are added. These termination
resistors are only needed if the outputs must drive an MII cable or other
transmission line type load, such as in the external PHY application
shown in
Figure A.3
. If the L80227 is used in embedded applications,
such as adapter cards and switching hubs (see
Figure A.1
and
Figure A.2
), these terminations resistors are not needed.
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參數描述
L80227/B 制造商:LSI Corporation 功能描述: 制造商:LSI Corporation 功能描述:L80227/B
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