IX-1
Index
Numerics
160-pin package outline drawing
11-25
160-pin package pinout
11-24
16-bit checksum
A-10
2:1 horizontal decimation
4-61
filter
9-20
2-field display system
9-2
2-frame store mode
8-34
2-tap chroma vertical filter
9-16
3:2 pulldown
1-4
,
4-62
,
8-41
,
9-38
,
B-1
3:2 pulldown control
4-62
3:2 pulldowns
7-11
3-frame store
8-43
,
8-46
3-frame store mode
8-30
3-state outputs
11-4
,
11-5
4:2:2 component video data
9-2
4-tap luma vertical filter
9-16
8-tap interpolation filter
9-20
8-tap polyphase filter
9-20
A
A/V decoder chip overview
1-2
to
1-5
A/V decoding system block diagram
1-2
A/V elementary streams See elementary streams
A/V packets multiplexed
6-16
A/V PES mode channel interface flowchart
6-31
A/V PES packets See PES packets
A/V synchronization
4-21
,
4-28
,
4-29
,
A-11
A/VREQn circuits block diagram
6-7
A[8:0] signal
2-3
description
2-3
A_ACLK signal
2-10
description
2-10
timing
11-17
usage overview
10-6
,
10-28
AC coefficients
A-4
AC test load
3-state output
11-5
standard output
11-4
AC timing
11-4
asynchronous channel writes
11-14
test conditions
11-5
accessing memory
1-3
,
1-5
,
5-10
external SDRAM
6-27
accessing trick modes
9-15
ACLK divider codes
4-86
ACLK divider select bits
4-85
code definitions
10-34
usage overview
10-33
,
10-34
ACLK select bits
4-84
usage overview
10-33
ACLK_32 signal
2-10
description
2-10
usage overview
10-32
ACLK_441 signal
2-10
description
2-10
usage overview
10-32
ACLK_48 signal
2-10
description
2-10
usage overview
10-32
active display area
9-5
backgrounds
9-13
color selection
9-13
timing intervals
9-7
active video interrupt
4-4
,
9-40
address bus
See also bus
host interface
5-1
SDRAM
2-7
,
7-1
address converter
1-3
,
1-4
,
7-2
address generator
9-2
address pointers
5-6
color lookup table
9-32
address strobe
2-3
addresses
A/V ES channel buffer end
6-13
,
7-8
A/V ES channel buffer start
6-13
,
7-8
audio channel buffer start
7-8
audio ES channel buffer end
4-24
audio ES channel buffer start
4-23
audio ES channel buffer write pointer
4-26