10-32
Audio Decoder Module
10.9.3 IEC958 Channel Status
The L64105 uses the first 32 C bits of each channel in each block to
carry the four bytes of channel status information shown in
Figure 10.15
.
The remaining C bits in the blocks are cleared to 0. The Copyright and
Emphasis bits are from the incoming bitstream. The S/P DIF Interface
inserts one of the two Category Codes shown in the following table:
Figure 10.15 IEC958 Channel Status
The host can overwrite the Copyright bit, the Emphasis bits, and
Category Code by setting the associated overwrite bit in Registers 355
(
page 4-87
) and 366, and writing to the Emphasis bit, Copyright field, or
Category field in Register 367. The remaining bits and fields of the
channel status bytes are fixed or filled in by the S/P DIF Interface as
shown in
Figure 10.15
.
10.10 Clock Divider
As mentioned in the output interface descriptions, the Clock Divider in
the Audio Decoder derives a BCLK for each interface and an LRCLK and
A_ACLK for the external DACs from an input audio clock. The L64105
has three audio clock input pins, ACLK_32, ACLK_441, and ACLK_48 for
Data Format
Default Category Code
PCM Samples
0b0000.0000
Digital Data
0b1001.1000
0
1
2
3
4
5
6
7
Byte 0
0 for
Consumer
Mode Only
1=Formatter
Output,
0 = Decoder
Output
Copyright
Emphasis from Bitstream
Mode = 0b00
Byte 1
Category Code (User Programmable)
Byte 2
Source Number = 0b0000
Channel (L = 0b1000, R = 0b0100,
Don’t Care = 0b0000)
Byte 3
Sampling Frequency (44.1/48/32)
Clock Accuracy = 0b01