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參數(shù)資料
| 型號(hào)： | L64007 |
| 廠商： | LSI CORP |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 13/166頁(yè) |
| 文件大?。?/td> | 1015K |
| 代理商： | L64007 |
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Arch
3 Wed May 28 17:36:23 1997
Draft 1/21/97
L64007 MPEG-2, DVB, JSAT Transport Demultiplexer Technical Manual
2-3
PRE.4 for Rev. D
Copyright 1997 by LSI Logic Corporation. All rights reserved.
The Transport Error Indicator (TEI), which is a bit in the transport
packet header, is set to 1 in the packet entering the chip.
The CDERR pin is asserted by an external channel decoder when
the rst bit or byte of the transport packet enters the L64007 (0x47
sync byte).
When the channel decoder interface detects an error condition, it dis-
cards the entire transport packet. Thus, all transport packets transmitted
to the PID Processor are error free.
Discarded transport packets, however, can cause breaks in the data
stream integrity. The L64007 PID processor detects a break in the data
stream when there is a Continuity Counter (CC) mismatch in the trans-
port level of processing, or a CRC32 error in the sections of the PSI level
of processing.
The CC mismatch occurs on the transport packet layer; it indicates the
loss of transport packets in the channel. In the case of audio and video
PIDs, the CC mismatch error propagates through the PPU, MMU, and
Output Control Unit (video and audio channel and respective transport
FIFOs). This CC error indication then is sent to the L64002, notifying it
of an error by activating the AVERR output pin. This causes the L64007
to request downstream devices (such as the L64002 or L64005) to start
the error concealment procedure.
CRC32 errors are generated uniquely for PSI section ltering; they do
not apply to PES packets. The CRC32 check veries the integrity of the
data within a section.
The channel decoder interface supports sustained input data rates up to
60 Mbit/s in serial conguration, and 13 Mbyte/s in parallel conguration.
For systems requiring a higher data rate on the channel interface, the
L64007 includes control logic and a channel-ready feedback signal
(CDRDY) that can be used to pause the channel momentarily and reduce
the average data rate to one the L64007 can handle. When the channel-
ready signal is LOW, the L64007 channel decoder interface cannot
accept any more data. Software can determine several channel operation
modes, including the parallel or serial connection interface modes, and
the start or end of channel activity. Once the channel decoder is in sync
lock, programming the channel to stop the input causes stoppage to
occur only on a packet boundary. The Channel Decoder interfaces seam-
lessly to LSI Logic channel devices (such as L64705 and L64704).
相關(guān)PDF資料 |
PDF描述 |
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| L64013A1 | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| L64014A | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| L64015 | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| L64020XDC | SPECIALTY CONSUMER CIRCUIT, CBGA208 |
| L64020XQC | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64010ADC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADCC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADM | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADMB | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Multiplier/Accumulator |
| L64010ADMC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Multiplier/Accumulator |
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