參數(shù)資料
型號(hào): ISP1362
廠商: NXP Semiconductors N.V.
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù): 63/150頁
文件大?。?/td> 647K
代理商: ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
63 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
14.3 OtgInterrupt register (R/W: 68H/E8H)
Code (Hex): 68
read
Code (Hex): E8
write
Table 25:
Bit
15 to 10
9
OtgStatus register: bit description
Symbol
Description
-
reserved
SE0_2MS
0
bus is in SE0 for less than 2 ms
1
bus is in SE0 for more than 2 ms
reserved
0
remote pull-up resistor disconnected
8 to 6
5
-
RMT_
CONN
1
remote pull-up resistor connected
Remark:
When the local pull-up resistor on the DP-line is
disabled, a 50
μ
s delay is applied before RMT_CONN detection
is enabled.
For the B-device (ID_REG = 1), this bit is a B-device session
valid indicator (B_SESS_VLD).
4
B_SESS_VLD
0
V
BUS
is lower than VB_SESS_VLD
1
V
BUS
is higher than VB_SESS_VLD
For the A-device (ID_REG = 0), this bit is an A-device session
valid indicator (A_SESS_VLD).
3
A_SESS_VLD
0
V
BUS
is lower than VA_SESS_VLD
1
V
BUS
is higher than VA_SESS_VLD
B_SESS_END For the B-device (ID_REG = 1), this bit is a B-device session
end indicator (B_SESS_END).
2
0
V
BUS
is higher than VB_SESS_END
1
V
BUS
is lower than VB_SESS_END
For the A-device (ID_REG = 0), this bit is an A-device V
BUS
valid indicator (A_VBUS_VLD).
1
A_VBUS_VLD
0
V
BUS
is lower than VA_VBUS_VLD
1
V
BUS
is higher than VA_VBUS_VLD
This bit re
fl
ects the logic level of the ID pin.
0
ID_REG
0
ID pin is LOW (mini-A plug is inserted in the device
s
mini-AB receptacle)
1
ID pin is HIGH (no plug or mini-B plug is inserted in the
device
s mini-AB receptacle)
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