參數(shù)資料
型號(hào)： ISP1362
廠商： NXP Semiconductors N.V.
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù)： 111/150頁
文件大?。?/td> 647K
代理商： ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
111 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
If the packet length is odd, the upper byte of the last word in an IN endpoint buffer
is
not
transmitted to the host. When reading from an OUTendpoint buffer, the
upper byte of the last word must be ignored by the
fi
rmware. The packet length is
stored in the
fi
rst two bytes of the endpoint buffer.
Table 107: DC command and register summary
Name
Initialization commands
Write Control OUT Con
fi
guration
Destination
Code (Hex)
Transaction
[1]
DcEndpointCon
fi
guration register
endpoint 0 OUT
DcEndpointCon
fi
guration register
endpoint 0 IN
DcEndpointCon
fi
guration register
endpoint 1 to 14
DcEndpointCon
fi
guration register
endpoint 0 OUT
DcEndpointCon
fi
guration register
endpoint 0 IN
DcEndpointCon
fi
guration register
endpoint 1 to 14
DcAddress register
DcMode register
DcHardwareCon
fi
guration register BA/BB
DcInterruptEnable register
20
write 1 byte
[2]
Write Control IN Con
fi
guration
21
write 1 byte
[2]
Write Endpoint n Con
fi
guration
(n = 1 to 14)
Read Control OUT Con
fi
guration
22 to 2F
write 1 byte
[2]
30
read 1 byte
[2]
Read Control IN Con
fi
guration
31
read 1 byte
[2]
Read Endpoint n Con
fi
guration
(n = 1 to 14)
Write or read Device Address
Write or read Mode register
Write or read Hardware Con
fi
guration
Write or read DcInterruptEnable
register
Write or read DMA Con
fi
guration
Write or read DMA Counter
Reset Device
Data
fl
ow commands
Write Control OUT Buffer
Write Control IN Buffer
Write Endpoint n Buffer
(n = 1 to 14)
32 to 3F
read 1 byte
[2]
B6/B7
B8/B9
write or read 1 byte
[2]
write or read 1 byte
[2]
write or read 2 bytes
write or read 4 bytes
C2/C3
DcDMACon
fi
guration register
DcDMACounter register
resets all registers
F0/F1
F2/F3
F6
write or read 2 bytes
write or read 2 bytes
-
illegal: endpoint is read-only
buffer memory endpoint 0 IN
buffer memory endpoint 1 to 14
(IN endpoints only)
(00)
01
02 to 0F
-
N
≤
64 bytes
isochronous:
N
≤
1023 bytes
interrupt/bulk: N
≤
64 bytes
N
≤
64 bytes
-
isochronous:
N
≤
1023 bytes
[4]
interrupt/bulk: N
≤
64 bytes
-
-
-
Read Control OUT Buffer
Read Control IN Buffer
Read Endpoint n Buffer
(n = 1 to 14)
buffer memory endpoint 0 OUT
illegal: endpoint is write-only
buffer memory endpoint 1 to 14
(OUT endpoints only)
10
(11)
12 to 1F
Stall Control OUT Endpoint
Stall Control IN Endpoint
Stall Endpoint n
(n = 1 to 14)
Read Control OUT Status
Endpoint 0 OUT
Endpoint 0 IN
Endpoint 1 to 14
40
41
42 to 4F
DcEndpointStatus register
endpoint 0 OUT
DcEndpointStatus register
endpoint 0 IN
50
read 1 byte
[2]
Read Control IN Status
51
read 1 byte
[2]
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