參數(shù)資料
型號: ISP1362
廠商: NXP Semiconductors N.V.
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù): 62/150頁
文件大?。?/td> 647K
代理商: ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
62 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
14.2 OtgStatus register (R: 67H)
Code (Hex): 67
read only
4
LOC_
CONN
0
disconnect the on-chip pull-up resistor on DP of the OTG port
1
connect the on-chip pull-up resistor on DP of the OTG port
This bit is for the A-device only. This bit is used to choose the power
source to drive V
BUS
.
3
SEL_CP_
EXT
0
use on-chip charge pump to drive V
BUS
1
use external power source (+5 V) to drive V
BUS
Remark:
When using the external power source, the H_PSW1 pin
serves as the power switch that is controlled by the DRV_VBUS bit of
this register.
This bit is for the B-device only. If set, it will enable a pull-down
resistor on V
BUS
, which will help to speed up discharging of V
BUS
below session end threshold voltage.
2
DISCHRG_
VBUS
0
disable
1
enable
This bit is for the B-device only. If set, it will charge V
BUS
through a
resistor.
1
CHRG_
VBUS
0
disable charging V
BUS
of the OTG port
1
enable charging V
BUS
of the OTG port
DRV_VBUS This bit is used to enable the on-chip charge pump or external power
source to drive V
BUS
. For the B-device, it shall not enable this bit at
any time.
0
0
disable driving V
BUS
of the OTG port
1
enable driving V
BUS
of the OTG port
Table 23:
Bit
OtgControl register: bit description
continued
Symbol
Description
Table 24:
Bit
Symbol
Reset
Access
Bit
Symbol
OtgStatus register: bit allocation
15
14
13
12
11
10
9
8
reserved
SE0_2MS
0
R
1
A_VBUS_
VLD
0
R
reserved
-
-
0
ID_REG
-
-
7
-
-
6
-
-
5
-
-
4
-
-
3
-
-
2
reserved
RMT_
CONN
0
R
B_SESS_
VLD
0
R
A_SESS_
VLD
0
R
B_SESS_
END
1
R
Reset
Access
-
-
-
-
1
R
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