參數(shù)資料
型號： ISP1362
廠商： NXP Semiconductors N.V.
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： 單芯片通用串行總線和On - The - Go控制器
文件頁數(shù)： 15/150頁
文件大?。?/td> 647K
代理商： ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
15 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.1 Memory organization
The buffer memory in the HC uses a multicon
fi
gurable direct addressing architecture.
The 4096 bytes HC buffer memory is shared by the ISTL0, ISTL1, INTL and ATL
buffers. ISTL0 and ISTL1 are used for isochronous traf
fi
c (double buffer), INTL is
used for interrupt traf
fi
c, and ATL is used for control and bulk traf
fi
c.
The allocation of the buffer memory follows the sequence ISTL0, ISTL1, INTL, ATL
and unused memory. For example, consider that the buffer sizes of the ISTL, INTL
and ATL buffers are 1024 bytes, 1024 bytes and 1024 bytes, respectively. Then,
ISTL0 will start from memory location 0, ISTL1 will start from memory location 1024
(size of ISTL0), INTL will start from memory location 2048 (size of ISTL0 + size of
ISTL1) and ATL will start from memory location 3072 (size of ISTL0 + size of
ISTL1 + size of INTL).
The HCD has the responsibility to ensure that the sum of the four memory buffers
does not exceed the total memory size. If this condition is violated, it will lead to data
corruption. The buffer size must be a multiple of two bytes (one word).
The buffer memory of the DC follows a similar architecture. Details on the DC
memory area allocation can be found in
Section 13.3
. Note that the DC buffer
memory does not support the direct addressing mode.
9.1.1
Memory organization for the HC
The HC in the ISP1362 has a total of 4096 bytes of buffer memory. This buffer area is
divided into four parts (see
Table 4
and
Figure 4
):
The ISTL0 and ISTL1 buffers must have the same size. Memory is allocated by
the HC according to the value set by the HCD in HcISTLBufferSize,
HcINTLBufferSize and HcATLBufferSize. All buffer sizes must be multiples of two
bytes (one word).
Table 4:
Buffer memory area
ISTL0 and ISTL1
INTL
ATL
Buffer memory areas and their applications
Application
isochronous transfer (double buffering)
interrupt transfer
control and bulk transfer
相關(guān)PDF資料
PDF描述
ISP1362BD Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE Single-chip Universal Serial Bus On-The-Go controller
ISP1501 Hi-Speed Universal Serial Bus peripheral transceiver
ISP1520 Hi-Speed Universal Serial Bus hub controller
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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