參數(shù)資料
型號(hào): IBM038329NL6B
廠商: IBM Microeletronics
英文描述: 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動(dòng)態(tài)RAM(帶內(nèi)置的圖形性能))
中文描述: 256K × 32同步圖形RAM(256K × 32位高性能800萬的CMOS同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器(帶內(nèi)置的圖形性能))
文件頁數(shù): 48/66頁
文件大?。?/td> 952K
代理商: IBM038329NL6B
IBM038329NL6B
IBM038329NP6B
256K x 32 Synchronous Graphics RAM
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 48 of 66
03K4292.E35604
Revised 3/98
Block Write (BW)
Each Block Write cycle writes a single data value from the color register to the block of eight consecutive col-
umn locations addressed by A
7
-A
3
. The information on the DQs which is registered coincident with the Block
Write command is used to mask specific column/byte combinations within the block. Various DQ planes and
column addresses are masked according to the following functional logic:
For example, if DQ0 is “0”, then {X,Y,Z} becomes {0,0,0} and the column 0 with its planes 0-7 is masked from
the selected block of columns. If DQ14 is “0”, then {X,Y,Z} becomes {1,1,0} and the column with address 6
with its planes 8-15 is masked from the selected block of columns. When a “0” is registered in a particular DQ
signal coincident with a Block Write command, the write to the corresponding column/byte combination is
masked. When a “1” is registered, the Color Register data will be written to the corresponding DRAM cells,
subject to the DQM and the WPB masking. The overall Block Write mask consists of a combination of the
DQM signals, the WPB mask register, and the column/byte mask information.
Block Write Timing Considerations
A Block Write access requires a time period of t
BWC
to execute. When following a Block Write with a Pre-
charge command to the same bank, t
BPL
must be met.
DQs
Column Address
DQ Planes Affected
A2
A1
A0
DQ0 - DQ7
X
Y
Z
P0 - P7
DQ8 - DQ15
X
Y
Z
P8 - P15
DQ16 - DQ23
X
Y
Z
P16 - P23
DQ24 - DQ31
X
Y
Z
P24 - P31
相關(guān)PDF資料
PDF描述
IBM038329NP6B 256K x 32 Synchronous Graphics RAM(256K x 32 高性能8M位CMOS同步動(dòng)態(tài)RAM(帶內(nèi)置的圖形性能))
IBM041812PQKB 64K X 18 BURST SRAM(64K X 18高性能可猝發(fā)同步CMOS靜態(tài)RAM)
IBM041813PPLB 64K X 18 BURST PIPELINE SRAM(1M (64K X 18)同步可猝發(fā)流水線式線式高性能靜態(tài)RAM)
IBM041813PQKB 64K X 18 Burst Pipeline SRAM(1M(64K X 18)高性能同步可猝發(fā)管線式靜態(tài)RAM)
IBM041814PPLB 64K X 18 BURST SRAM(1M (64K X 18)同步可猝發(fā)高性能靜態(tài)RAM)
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