
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 05
User
’
s Manual U15862EJ3V0UD
329
(2) Measurement of two pulse widths with free-running counter
The pulse widths of two signals respectively input to the TI0n0 pin and the TI0n1 pin can be simultaneously
measured when 16-bit timer counter 0n (TM0n) is used as a free-running counter (refer to
Figure 7-11
).
When the edge specified by bits 4 and 5 (ESn00, ESn01) of prescaler mode register 0n (PRM0n) is input to
the TI0n0 pin, the value of the TM0n register is loaded to 16-bit timer capture/compare register 0n1 (CR0n1)
and an external interrupt request signal (INTTM0n1) is set.
When the edge specified by bits 6 and 7 (ESn10 and ESn11) of the PRM0n register is input to the TI0n1 pin,
the value of the TM0n register is loaded to 16-bit timer capture/compare register 0n0 and an external interrupt
request signal (INTTM0n0) is set.
The edges of the TI0n0 and TI0n1 pins are specified by bits 4 and 5 (ESn00 and ESn01) and bits 6 and 7
(ESn10, ESn11) of the PRM0n register, respectively. The rising, falling, or both rising and falling edges can be
specified.
The valid edge of the TI0n0 pin is detected through sampling at the count clock cycle selected with the PRM0n
register, and the capture operation is not performed until the valid level is detected twice. As a result, noise
with a short pulse width can be eliminated.
Remark
n = 0 to 5
Figure 7-11. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
(a) 16-bit timer mode control register 0n (TMC0n)
0
TMC0n
0
0
0
0
1
0/1
0
TMC0n3 TMC0n2 TMC0n1
OVF0n
Free-running mode
(b) Capture/compare control register 0n (CRC0n)
0
CRC0n
0
0
0
0
1
0
1
CRC0n2 CRC0n1 CRC0n0
CR0n0 used as capture register
Captures to CR0n0 at valid
edge of TI0n1 pin
CR0n1 used as capture register
Remarks 1.
0/1: When these bits are reset to 0 or set to 1, other functions can be used together with the pulse
width measurement function. For details, refer to
7.3 (1) 16-bit timer mode control register 0n
(TMC0n)
.
2.
n = 0 to 5